From patchwork Mon Sep 18 09:37:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Schneider-Pargmann X-Patchwork-Id: 724352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D89F6CD13D2 for ; Mon, 18 Sep 2023 09:39:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239278AbjIRJip (ORCPT ); Mon, 18 Sep 2023 05:38:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240917AbjIRJi2 (ORCPT ); Mon, 18 Sep 2023 05:38:28 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E8BD411B for ; Mon, 18 Sep 2023 02:38:20 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id 38308e7fff4ca-2c00c0f11b2so11827761fa.1 for ; Mon, 18 Sep 2023 02:38:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1695029899; x=1695634699; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J0qTvBf5FgaTyQcfbl+e1xRZRJHDSVi0KUDZ9vhIQHg=; b=oOOfIxvcCom8Qknl86kCa51aTwg9VPwWni3Xp8whUw2y8BMi7wx0vNF8iKPRoSZxfF 5CjAfJdUHr7K86DvWlT6LBm7A98jQ2AHFvnAVjvWxMVDqZrpok3iGmBte5UPhWx2s65f QZhmVcWfke/oQNRFcZ8RQp7icSDrMRlhFCl5sgCqEGBTGpTSrILG2hhLy69nbHlBZ2d9 /gPyMgEnDlCo9k3vUCDJiAakYI+SgPHJSpDbI3ldHlL9q1Ee7WqvrOQTUbFTrSywZ62k 6GA/kt6XqJ4pNLrE9/wMXyGktVSXjZR8WH7mjvOiS2Ye5PLN4q8B1vVR/5coEd7s3UZC IKUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695029899; x=1695634699; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J0qTvBf5FgaTyQcfbl+e1xRZRJHDSVi0KUDZ9vhIQHg=; b=aNeuK3DM/6j0Dz5Q+bzU5gBCGgC/u3CTjWIHyrkLZP2T36DTvCx/yqtY5xLDVbRiew s6RCaLqkW3+2at+yre6d1s/GBCfSm3k1q7h4GBqw3Nh8fQAQlrVZANkmhZT8qjE9jnyd 1AyskoYnCnC2ClKEk5zRK4s8mn+PZ+AtCoY+Wrs/XLstd9dkaeyzVLbcF2ONNhZVzLnK tihdZZyBNRpIVFRDz3PjrN3jKOobSEYbzeCGJmINvMTPNPLWrBPLaiHCIN48U/R8Bf3E bYrhhirnCSUH1+HCtv4AxE0N3BSVVlNDJo5OrQJzaJ4Ffa1/T8Bp88GFQLXMNNfsuibj i7DQ== X-Gm-Message-State: AOJu0Yxf1F5WBt0SXeD2YVVjTRN6zc0m7eH6pe2jKBXdYDfeVPWzGdyz pkeHoLmOeg328MlsAmL7S6arzQ== X-Google-Smtp-Source: AGHT+IHApuTk1zSQ5D9rsSPW1G3kKCj3AYq8GUd1jeVahiGLMEv5UIxIC2+BG5cae36fnNDNCoDOqA== X-Received: by 2002:a2e:8514:0:b0:2b9:dd5d:5d0c with SMTP id j20-20020a2e8514000000b002b9dd5d5d0cmr6392362lji.52.1695029899063; Mon, 18 Sep 2023 02:38:19 -0700 (PDT) Received: from blmsp.fritz.box ([2001:4091:a246:8222:872:4a5b:b69c:1318]) by smtp.gmail.com with ESMTPSA id o10-20020a1709061d4a00b0099293cdbc98sm6251164ejh.145.2023.09.18.02.38.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Sep 2023 02:38:18 -0700 (PDT) From: Markus Schneider-Pargmann To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger Cc: Ulf Hansson , Alexandre Mergnat , Chun-Jie Chen , AngeloGioacchino Del Regno , Tinghan Shen , Fabien Parent , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Fabien Parent , Markus Schneider-Pargmann , Krzysztof Kozlowski , Rob Herring Subject: [PATCH v8 1/8] dt-bindings: power: Add MT8365 power domains Date: Mon, 18 Sep 2023 11:37:45 +0200 Message-Id: <20230918093751.1188668-2-msp@baylibre.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230918093751.1188668-1-msp@baylibre.com> References: <20230918093751.1188668-1-msp@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent Add power domains dt-bindings for MT8365. Signed-off-by: Fabien Parent Signed-off-by: Markus Schneider-Pargmann Acked-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat Tested-by: Alexandre Mergnat --- .../power/mediatek,power-controller.yaml | 6 ++++++ .../dt-bindings/power/mediatek,mt8365-power.h | 19 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 include/dt-bindings/power/mediatek,mt8365-power.h diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index c9acef80f452..8985e2df8a56 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -31,6 +31,7 @@ properties: - mediatek,mt8188-power-controller - mediatek,mt8192-power-controller - mediatek,mt8195-power-controller + - mediatek,mt8365-power-controller '#power-domain-cells': const: 1 @@ -88,6 +89,7 @@ $defs: "include/dt-bindings/power/mediatek,mt8188-power.h" - for MT8188 type power domain. "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain. "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain. + "include/dt-bindings/power/mediatek,mt8365-power.h" - for MT8365 type power domain. maxItems: 1 clocks: @@ -115,6 +117,10 @@ $defs: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the INFRACFG register range. + mediatek,infracfg-nao: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the device containing the INFRACFG-NAO register range. + mediatek,smi: $ref: /schemas/types.yaml#/definitions/phandle description: phandle to the device containing the SMI register range. diff --git a/include/dt-bindings/power/mediatek,mt8365-power.h b/include/dt-bindings/power/mediatek,mt8365-power.h new file mode 100644 index 000000000000..e6cfd0ec7871 --- /dev/null +++ b/include/dt-bindings/power/mediatek,mt8365-power.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (c) 2022 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H +#define _DT_BINDINGS_POWER_MT8365_POWER_H + +#define MT8365_POWER_DOMAIN_MM 0 +#define MT8365_POWER_DOMAIN_CONN 1 +#define MT8365_POWER_DOMAIN_MFG 2 +#define MT8365_POWER_DOMAIN_AUDIO 3 +#define MT8365_POWER_DOMAIN_CAM 4 +#define MT8365_POWER_DOMAIN_DSP 5 +#define MT8365_POWER_DOMAIN_VDEC 6 +#define MT8365_POWER_DOMAIN_VENC 7 +#define MT8365_POWER_DOMAIN_APU 8 + +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */