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[83.9.30.53]) by smtp.gmail.com with ESMTPSA id p13-20020a05651238cd00b004fdc7ec5cbesm2016936lft.300.2023.07.31.03.52.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 03:52:36 -0700 (PDT) From: Konrad Dybcio Date: Mon, 31 Jul 2023 12:52:21 +0200 Subject: [PATCH v2 05/10] interconnect: qcom: qcm2290: Hook up MAS_APPS_PROC's bus clock MIME-Version: 1.0 Message-Id: <20230726-topic-icc_coeff-v2-5-8c91c6c76076@linaro.org> References: <20230726-topic-icc_coeff-v2-0-8c91c6c76076@linaro.org> In-Reply-To: <20230726-topic-icc_coeff-v2-0-8c91c6c76076@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Michael Turquette , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1690800744; l=2199; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=wbL0knkbb9r2z/rU8oFtpvr0ZnPgIjvL/nER+Pi+b14=; b=F54RLC1nkOXm1+NJ9KBW35GMKssUAl/upy5JEMNXbvCl5C58zJHTCq9IxqTACqRZbGMShABx8 F9eBe1EmhCyD8mGy/I8USvUDuSNKiMRPlF8oFfpATmduKCPgQXVzbES X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This single node has its own clock which seems to be responsible for transactions between CPUSS (CPU + some stuff) and the GNOC. Define it and hook it up. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm-clocks.c | 6 ++++++ drivers/interconnect/qcom/icc-rpm.h | 1 + drivers/interconnect/qcom/qcm2290.c | 3 +++ 3 files changed, 10 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm-clocks.c b/drivers/interconnect/qcom/icc-rpm-clocks.c index 63c82a91bbc7..ac1677de7dfd 100644 --- a/drivers/interconnect/qcom/icc-rpm-clocks.c +++ b/drivers/interconnect/qcom/icc-rpm-clocks.c @@ -25,6 +25,12 @@ const struct rpm_clk_resource bimc_clk = { }; EXPORT_SYMBOL_GPL(bimc_clk); +const struct rpm_clk_resource mem_1_clk = { + .resource_type = QCOM_SMD_RPM_MEM_CLK, + .clock_id = 1, +}; +EXPORT_SYMBOL_GPL(mem_1_clk); + const struct rpm_clk_resource bus_0_clk = { .resource_type = QCOM_SMD_RPM_BUS_CLK, .clock_id = 0, diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 1a26a7b82166..dc8e37c0a263 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -152,6 +152,7 @@ extern const struct rpm_clk_resource bimc_clk; extern const struct rpm_clk_resource bus_0_clk; extern const struct rpm_clk_resource bus_1_clk; extern const struct rpm_clk_resource bus_2_clk; +extern const struct rpm_clk_resource mem_1_clk; extern const struct rpm_clk_resource mmaxi_0_clk; extern const struct rpm_clk_resource mmaxi_1_clk; extern const struct rpm_clk_resource qup_clk; diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index 3c3b24264a5b..52a6eb32e832 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -112,6 +112,9 @@ static struct qcom_icc_node mas_appss_proc = { .qos.qos_mode = NOC_QOS_MODE_FIXED, .qos.prio_level = 0, .qos.areq_prio = 0, + .bus_clk_desc = &mem_1_clk, + .ab_coeff = 159, + .ib_coeff = 96, .mas_rpm_id = 0, .slv_rpm_id = -1, .num_links = ARRAY_SIZE(mas_appss_proc_links),