| Message ID | 20230704093242.583575-18-s.hauer@pengutronix.de |
|---|---|
| State | New |
| Headers | show |
| Series | Add perf support to the rockchip-dfi driver | expand |
On 23. 7. 4. 18:32, Sascha Hauer wrote: > The currently supported RK3399 has a stride of 20 between the channel > specific registers. Upcoming RK3588 has a different stride, so put > the stride into driver data to make it configurable. > While at it convert decimal 20 to hex 0x14 for consistency with RK3588 > which has a register stride 0x4000 and we want to write that in hex > as well. > > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > drivers/devfreq/event/rockchip-dfi.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c > index 969b62f071b83..85ec93fd41858 100644 > --- a/drivers/devfreq/event/rockchip-dfi.c > +++ b/drivers/devfreq/event/rockchip-dfi.c > @@ -112,6 +112,7 @@ struct rockchip_dfi { > int active_events; > int burst_len; > int buswidth[DMC_MAX_CHANNELS]; > + int ddrmon_stride; > }; > > static int rockchip_dfi_enable(struct rockchip_dfi *dfi) > @@ -189,13 +190,13 @@ static void rockchip_dfi_read_counters(struct rockchip_dfi *dfi, struct dmc_coun > if (!(dfi->channel_mask & BIT(i))) > continue; > c->c[i].read_access = readl_relaxed(dfi_regs + > - DDRMON_CH0_RD_NUM + i * 20); > + DDRMON_CH0_RD_NUM + i * dfi->ddrmon_stride); > c->c[i].write_access = readl_relaxed(dfi_regs + > - DDRMON_CH0_WR_NUM + i * 20); > + DDRMON_CH0_WR_NUM + i * dfi->ddrmon_stride); > c->c[i].access = readl_relaxed(dfi_regs + > - DDRMON_CH0_DFI_ACCESS_NUM + i * 20); > + DDRMON_CH0_DFI_ACCESS_NUM + i * dfi->ddrmon_stride); > c->c[i].clock_cycles = readl_relaxed(dfi_regs + > - DDRMON_CH0_COUNT_NUM + i * 20); > + DDRMON_CH0_COUNT_NUM + i * dfi->ddrmon_stride); Before this path, rk3399 and rk3568 have used the same stride. But, this patch add the ddrmon_stride for only rk3399. It seems that the behavior of rk3568 is changed. If ddrmon_stride is not required for rk3568, you must move this patch before adding rk3568 support patch ("PM / devfreq: rockchip-dfi: Add RK3568 support"). > } > } > > @@ -664,6 +665,8 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) > dfi->buswidth[0] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH0, val) == 0 ? 4 : 2; > dfi->buswidth[1] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH1, val) == 0 ? 4 : 2; > > + dfi->ddrmon_stride = 0x14; > + > return 0; > }; >
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c index 969b62f071b83..85ec93fd41858 100644 --- a/drivers/devfreq/event/rockchip-dfi.c +++ b/drivers/devfreq/event/rockchip-dfi.c @@ -112,6 +112,7 @@ struct rockchip_dfi { int active_events; int burst_len; int buswidth[DMC_MAX_CHANNELS]; + int ddrmon_stride; }; static int rockchip_dfi_enable(struct rockchip_dfi *dfi) @@ -189,13 +190,13 @@ static void rockchip_dfi_read_counters(struct rockchip_dfi *dfi, struct dmc_coun if (!(dfi->channel_mask & BIT(i))) continue; c->c[i].read_access = readl_relaxed(dfi_regs + - DDRMON_CH0_RD_NUM + i * 20); + DDRMON_CH0_RD_NUM + i * dfi->ddrmon_stride); c->c[i].write_access = readl_relaxed(dfi_regs + - DDRMON_CH0_WR_NUM + i * 20); + DDRMON_CH0_WR_NUM + i * dfi->ddrmon_stride); c->c[i].access = readl_relaxed(dfi_regs + - DDRMON_CH0_DFI_ACCESS_NUM + i * 20); + DDRMON_CH0_DFI_ACCESS_NUM + i * dfi->ddrmon_stride); c->c[i].clock_cycles = readl_relaxed(dfi_regs + - DDRMON_CH0_COUNT_NUM + i * 20); + DDRMON_CH0_COUNT_NUM + i * dfi->ddrmon_stride); } } @@ -664,6 +665,8 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) dfi->buswidth[0] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH0, val) == 0 ? 4 : 2; dfi->buswidth[1] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH1, val) == 0 ? 4 : 2; + dfi->ddrmon_stride = 0x14; + return 0; };