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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Mar 2023 18:27:08.8834 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e37ed870-55d1-4b49-0101-08db2970b734 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT092.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6979 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org If BPMP-FW doesn't support 'MRQ_BWMGR_INT', then the MC Client driver probe fails with 'EPROBE_DEFER' which it receives on calling the func 'devm_of_icc_get()'. Fix this by initializing the ICC even if the MRQ is missing and return 'EINVAL' from 'icc_set_bw()' instead of passing the request to BPMP-FW later when the BW request is made by client. Fixes: ("memory: tegra: add interconnect support for DRAM scaling in Tegra234") Signed-off-by: Sumit Gupta --- drivers/memory/tegra/tegra186-emc.c | 13 +++++++------ drivers/memory/tegra/tegra234.c | 6 ++++++ include/soc/tegra/mc.h | 2 +- 3 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/memory/tegra/tegra186-emc.c b/drivers/memory/tegra/tegra186-emc.c index 978be8f54de4..0d68a20fd376 100644 --- a/drivers/memory/tegra/tegra186-emc.c +++ b/drivers/memory/tegra/tegra186-emc.c @@ -343,13 +343,14 @@ static int tegra186_emc_probe(struct platform_device *pdev) mc = dev_get_drvdata(emc->dev->parent); if (mc && mc->soc->icc_ops) { - if (tegra_bpmp_mrq_is_supported(emc->bpmp, MRQ_BWMGR_INT)) { - err = tegra_emc_interconnect_init(emc); - if (err) - goto put_bpmp; - } else { + err = tegra_emc_interconnect_init(emc); + if (err) + goto put_bpmp; + + if (tegra_bpmp_mrq_is_supported(emc->bpmp, MRQ_BWMGR_INT)) + mc->bwmgr_mrq_supported = true; + else dev_info(&pdev->dev, "MRQ_BWMGR_INT not present\n"); - } } return 0; diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c index 0b608b820b28..5b4b359f7c71 100644 --- a/drivers/memory/tegra/tegra234.c +++ b/drivers/memory/tegra/tegra234.c @@ -828,6 +828,9 @@ static int tegra234_mc_icc_set(struct icc_node *src, struct icc_node *dst) if (src->id == dst->id) return 0; + if (!mc->bwmgr_mrq_supported) + return -EINVAL; + bpmp = of_tegra_bpmp_get(); if (IS_ERR(bpmp)) { ret = PTR_ERR(bpmp); @@ -874,6 +877,9 @@ static int tegra234_mc_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, struct icc_provider *p = node->provider; struct tegra_mc *mc = icc_provider_to_tegra_mc(p); + if (!mc->bwmgr_mrq_supported) + return -EINVAL; + if (node->id == TEGRA_ICC_MC_CPU_CLUSTER0 || node->id == TEGRA_ICC_MC_CPU_CLUSTER1 || node->id == TEGRA_ICC_MC_CPU_CLUSTER2) { diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 2fe6f0217a39..522b7679500c 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -234,7 +234,7 @@ struct tegra_mc { struct tegra_mc_timing *timings; unsigned int num_timings; unsigned int num_channels; - + bool bwmgr_mrq_supported; struct reset_controller_dev reset; struct icc_provider provider;