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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id i2-20020ac25222000000b004d86808fd33sm948465lfl.15.2023.03.13.04.41.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 04:41:17 -0700 (PDT) From: Konrad Dybcio Date: Mon, 13 Mar 2023 12:41:07 +0100 Subject: [PATCH v2 1/7] dt-bindings: interconnect: qcom,msm8998-bwmon: Resolve MSM8998 support MIME-Version: 1.0 Message-Id: <20230304-topic-ddr_bwmon-v2-1-04db989db059@linaro.org> References: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> In-Reply-To: <20230304-topic-ddr_bwmon-v2-0-04db989db059@linaro.org> To: Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Rob Herring , Thara Gopinath , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678707675; l=3131; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=SbN98Ibah4gas5eacqICwCuMX8VfaPWlZmkr7n14GAg=; b=DdyWr1FxIsUnPNy/1QEqjJJtlRLNjh6PqilSYN3ygAQcO44LPckma+4V/1hDmmIjwyBAFbysYGX1 Dz6T7uwpDLzhX+9LiT3WKSbb7aQXxdaPXvTOC12NEsCFPDAhU6D1 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org BWMONv4 has two sets of registers: one for handling the monitor itself and one called "global" which hosts some sort of a headswitch and an interrupt control register. We did not handle that one before, as on SoCs starting with SDM845 they have been merged into a single contiguous range. To make the qcom,msm8998-bwmon less confusing and in preparation for actual MSM8998 support, describe the global register space and introduce new "qcom,sdm845-cpu-bwmon" compatible while keeping the "qcom,sdm845-bwmon" as a fallback for SoCs with this merged register space scheme. Signed-off-by: Konrad Dybcio --- .../bindings/interconnect/qcom,msm8998-bwmon.yaml | 41 ++++++++++++++++++---- 1 file changed, 34 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index 12a0d3ecbabb..5d17bdcfdf70 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -22,14 +22,14 @@ description: | properties: compatible: oneOf: + - const: qcom,msm8998-bwmon # BWMON v4 - items: - enum: - qcom,sc7280-cpu-bwmon - qcom,sc8280xp-cpu-bwmon - - qcom,sdm845-bwmon + - qcom,sdm845-cpu-bwmon - qcom,sm8550-cpu-bwmon - - const: qcom,msm8998-bwmon - - const: qcom,msm8998-bwmon # BWMON v4 + - const: qcom,sdm845-bwmon # BWMON v4, unified register space - items: - enum: - qcom,sc8280xp-llcc-bwmon @@ -49,9 +49,13 @@ properties: type: object reg: - # BWMON v4 (currently described) and BWMON v5 use one register address - # space. BWMON v2 uses two register spaces - not yet described. - maxItems: 1 + # BWMON v5 uses one register address space, v1-v4 use one or two. + minItems: 1 + maxItems: 2 + + reg-names: + minItems: 1 + maxItems: 2 required: - compatible @@ -63,13 +67,36 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + const: qcom,msm8998-bwmon + then: + properties: + reg: + minItems: 2 + + reg-names: + items: + - const: monitor + - const: global + + else: + properties: + reg: + maxItems: 1 + + reg-names: + maxItems: 1 + examples: - | #include #include pmu@1436400 { - compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon"; + compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon"; reg = <0x01436400 0x600>; interrupts = ; interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;