@@ -485,17 +485,9 @@ int qnoc_probe(struct platform_device *pdev)
for (i = 0; i < cd_num; i++)
qp->intf_clks[i].id = cds[i];
- if (desc->num_bus_clocks) {
- cds = desc->bus_clocks;
- cd_num = desc->num_bus_clocks;
- } else {
- cds = bus_clocks;
- cd_num = ARRAY_SIZE(bus_clocks);
- }
-
- for (i = 0; i < cd_num; i++)
- qp->bus_clks[i].id = cds[i];
- qp->num_bus_clks = cd_num;
+ qp->num_bus_clks = desc->no_clk_scaling ? 0 : NUM_BUS_CLKS;
+ for (i = 0; i < qp->num_bus_clks; i++)
+ qp->bus_clks[i].id = bus_clocks[i];
qp->type = desc->type;
qp->qos_offset = desc->qos_offset;
@@ -25,7 +25,7 @@ enum qcom_icc_type {
/**
* struct qcom_icc_provider - Qualcomm specific interconnect provider
* @provider: generic interconnect provider
- * @num_bus_clks: the total number of bus_clks clk_bulk_data entries
+ * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2)
* @num_intf_clks: the total number of intf_clks clk_bulk_data entries
* @type: the ICC provider type
* @regmap: regmap for QoS registers read/write access
@@ -100,10 +100,10 @@ struct qcom_icc_desc {
struct qcom_icc_node * const *nodes;
size_t num_nodes;
const char * const *bus_clocks;
- size_t num_bus_clocks;
const char * const *intf_clocks;
size_t num_intf_clocks;
bool has_bus_pd;
+ bool no_clk_scaling;
enum qcom_icc_type type;
const struct regmap_config *regmap_cfg;
unsigned int qos_offset;
@@ -1820,6 +1820,7 @@ static const struct qcom_icc_desc msm8996_a0noc = {
.intf_clocks = a0noc_intf_clocks,
.num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks),
.has_bus_pd = true,
+ .no_clk_scaling = true,
.regmap_cfg = &msm8996_a0noc_regmap_config
};
@@ -1616,6 +1616,7 @@ static const struct qcom_icc_desc sdm660_gnoc = {
.nodes = sdm660_gnoc_nodes,
.num_nodes = ARRAY_SIZE(sdm660_gnoc_nodes),
.regmap_cfg = &sdm660_gnoc_regmap_config,
+ .no_clk_scaling = true,
};
static struct qcom_icc_node * const sdm660_mnoc_nodes[] = {
For SMD RPM bus scaling to work, we need a pair of sleep-wake clocks. The variable number of them we previously supported was only a hack to keep the clocks required for QoS register access, but now that these are separated, we can leave bus_clks to the actual bus clocks. In cases where there is no actual bus scaling (such as A0NoC on MSM8996 and GNoC on SDM660 where the HLOS is only supposed to program the QoS registers and the bus is either static or controlled remotely), allow for no clock scaling with a boolean property. Remove all the code related to allowing an arbitrary number of bus_clks, replace the number by BUS_CLK_MAX (= 2) and guard the bus clock paths to ensure they are not taken on non-scaling buses. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/interconnect/qcom/icc-rpm.c | 14 +++----------- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- drivers/interconnect/qcom/msm8996.c | 1 + drivers/interconnect/qcom/sdm660.c | 1 + 4 files changed, 7 insertions(+), 13 deletions(-)