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[83.9.1.117]) by smtp.gmail.com with ESMTPSA id c13-20020a05651221ad00b004b53eb60e3csm645940lft.256.2023.02.17.02.46.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 02:46:39 -0800 (PST) From: Konrad Dybcio Date: Fri, 17 Feb 2023 11:46:26 +0100 Subject: [PATCH v5 05/10] interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks MIME-Version: 1.0 Message-Id: <20230217-topic-icc-fixes-v5-v5-5-c9a550f9fdb9@linaro.org> References: <20230217-topic-icc-fixes-v5-v5-0-c9a550f9fdb9@linaro.org> In-Reply-To: <20230217-topic-icc-fixes-v5-v5-0-c9a550f9fdb9@linaro.org> To: Andy Gross , Bjorn Andersson , Georgi Djakov , Evan Green , Jun Nie , Greg Kroah-Hartman , Brian Masney , Dmitry Baryshkov , Yassine Oudjana Cc: Georgi Djakov , Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1676630791; l=3438; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=aiMG32ahJtopvSpAYtuicAveB020UtGpy7a97D0jQ6M=; b=bWToGfiDHGkY4wV++Fm8DJyFVJXVAqKTWMe4CRzPQiX0tbrooaFBNY90Md8IuQT1y38MLHRAasdo Teug8/NwDZ62faBCvlpyzJf6IxVIB4gsXbqNztewiYUvXpF9HxE8 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org In preparation for handling non-scaling clocks that we still have to enable, rename num_clocks to more descriptive num_bus_clocks. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 14 +++++++------- drivers/interconnect/qcom/icc-rpm.h | 4 ++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 7a54fe4ccadd..f78c13e6c5ce 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -380,7 +380,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) return ret; } - for (i = 0; i < qp->num_clks; i++) { + for (i = 0; i < qp->num_bus_clks; i++) { /* * Use WAKE bucket for active clock, otherwise, use SLEEP bucket * for other clocks. If a platform doesn't set interconnect @@ -465,7 +465,7 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->bus_clks[i].id = cds[i]; - qp->num_clks = cd_num; + qp->num_bus_clks = cd_num; qp->type = desc->type; qp->qos_offset = desc->qos_offset; @@ -495,11 +495,11 @@ int qnoc_probe(struct platform_device *pdev) } regmap_done: - ret = devm_clk_bulk_get_optional(dev, qp->num_clks, qp->bus_clks); + ret = devm_clk_bulk_get_optional(dev, qp->num_bus_clks, qp->bus_clks); if (ret) return ret; - ret = clk_bulk_prepare_enable(qp->num_clks, qp->bus_clks); + ret = clk_bulk_prepare_enable(qp->num_bus_clks, qp->bus_clks); if (ret) return ret; @@ -521,7 +521,7 @@ int qnoc_probe(struct platform_device *pdev) ret = icc_provider_add(provider); if (ret) { dev_err(dev, "error adding interconnect provider: %d\n", ret); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); return ret; } @@ -554,7 +554,7 @@ int qnoc_probe(struct platform_device *pdev) return 0; err: icc_nodes_remove(provider); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); icc_provider_del(provider); return ret; @@ -566,7 +566,7 @@ int qnoc_remove(struct platform_device *pdev) struct qcom_icc_provider *qp = platform_get_drvdata(pdev); icc_nodes_remove(&qp->provider); - clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks); + clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); icc_provider_del(&qp->provider); return 0; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d6b4c56bf02c..d4401f35f6d2 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -23,7 +23,7 @@ enum qcom_icc_type { /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_clks: the total number of clk_bulk_data entries + * @num_bus_clks: the total number of bus_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @qos_offset: offset to QoS registers @@ -32,7 +32,7 @@ enum qcom_icc_type { */ struct qcom_icc_provider { struct icc_provider provider; - int num_clks; + int num_bus_clks; enum qcom_icc_type type; struct regmap *regmap; unsigned int qos_offset;