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[93.34.92.88]) by smtp.googlemail.com with ESMTPSA id h11-20020a05600c314b00b003db2e3f2c7csm5284292wmo.0.2023.01.20.16.01.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Jan 2023 16:01:52 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Stephen Boyd , Yassine Oudjana , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 1/3] dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional Date: Sat, 21 Jan 2023 01:01:44 +0100 Message-Id: <20230121000146.7809-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The qcom-cpufreq-nvmem driver also supports legacy devices pre-cpr that doesn't have power-domains. When the schema was introduced, it was wrongly set to always require these binding but this is not the case for legacy device that base everything on nvmem cells and multiple microvolt binding providing values based on speedbin, psv and version. Make the power-domain optional and set them required only for qcs404 based devices. Fixes: ec24d1d55469 ("dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema") Signed-off-by: Christian Marangi --- .../bindings/cpufreq/qcom-cpufreq-nvmem.yaml | 78 +++++++++++++------ 1 file changed, 54 insertions(+), 24 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml index 9c086eac6ca7..04aac634d7fc 100644 --- a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml +++ b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml @@ -17,6 +17,9 @@ description: | on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level according to the required OPPs defined in the CPU OPP tables. + For old implementation efuses are parsed to select the correct opp table and + voltage and CPR is not supported/used. + select: properties: compatible: @@ -33,37 +36,64 @@ select: required: - compatible -properties: - cpus: - type: object +if: + properties: + compatible: + contains: + enum: + - qcom,qcs404 - patternProperties: - '^cpu@[0-9a-f]+$': - type: object +then: + properties: + cpus: + type: object - properties: - power-domains: - maxItems: 1 + patternProperties: + '^cpu@[0-9a-f]+$': + type: object + + properties: + power-domains: + maxItems: 1 - power-domain-names: - items: - - const: cpr + power-domain-names: + items: + - const: cpr - required: - - power-domains - - power-domain-names + required: + - power-domains + - power-domain-names + + patternProperties: + '^opp-table(-[a-z0-9]+)?$': + if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + patternProperties: + '^opp-?[0-9]+$': + required: + - required-opps patternProperties: '^opp-table(-[a-z0-9]+)?$': - if: - properties: - compatible: - const: operating-points-v2-kryo-cpu - then: - patternProperties: - '^opp-?[0-9]+$': - required: - - required-opps + allOf: + - if: + properties: + compatible: + const: operating-points-v2-kryo-cpu + then: + $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# + + - if: + properties: + compatible: + const: operating-points-v2-qcom-level + then: + $ref: /schemas/opp/opp-v2-qcom-level.yaml# + + unevaluatedProperties: false additionalProperties: true