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[83.9.2.45]) by smtp.gmail.com with ESMTPSA id k23-20020a2e92d7000000b0027fd02c99d4sm1947071ljh.75.2023.01.04.05.29.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Jan 2023 05:29:22 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Sibi Sankar , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: qcom: sm6350: Set up DDR & L3 scaling Date: Wed, 4 Jan 2023 14:29:15 +0100 Message-Id: <20230104132915.667946-3-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230104132915.667946-1-konrad.dybcio@linaro.org> References: <20230104132915.667946-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add the CPU OPP tables including core frequency and L3 bus frequency. The L3 throughput values were chosen by studying the frequencies available in HW LUT and picking the highest one that's less than the CPU frequency. DDR clock rates come from the vendor kernel. Available values from the HW LUT: 300000000 556800000 652800000 806400000 844800000 940800000 1132800000 1209600000 1286400000 1401600000 1459200000 Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 131 +++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm7225.dtsi | 19 ++++ 2 files changed, 150 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 893a1ffb5e3d..411a8279f84f 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +50,9 @@ CPU0: cpu@0 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_0>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; @@ -68,6 +72,9 @@ CPU1: cpu@100 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_100>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; @@ -84,6 +91,9 @@ CPU2: cpu@200 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_200>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; @@ -100,6 +110,9 @@ CPU3: cpu@300 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_300>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; @@ -116,6 +129,9 @@ CPU4: cpu@400 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_400>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; @@ -132,6 +148,9 @@ CPU5: cpu@500 { dynamic-power-coefficient = <100>; next-level-cache = <&L2_500>; qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; @@ -149,6 +168,9 @@ CPU6: cpu@600 { dynamic-power-coefficient = <703>; next-level-cache = <&L2_600>; qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; @@ -165,6 +187,9 @@ CPU7: cpu@700 { dynamic-power-coefficient = <703>; next-level-cache = <&L2_700>; qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &clk_virt SLAVE_EBI_CH0 0>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; @@ -222,6 +247,112 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; + cpu0_opp_table: opp-table-cpu0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + /* DDR: 4-wide, 2 channels, double data rate, L3: 16-wide, 2 channels */ + opp-peak-kBps = <(200000 * 4 * 2 * 2) (300000 * 16 * 2)>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-peak-kBps = <(547000 * 4 * 2 * 2) (556800 * 16 * 2)>; + }; + + opp-768000000 { + opp-hz = /bits/ 64 <768000000>; + opp-peak-kBps = <(768000 * 4 * 2 * 2) (652800 * 16 * 2)>; + }; + + opp-1017600000 { + opp-hz = /bits/ 64 <1017600000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (940800 * 16 * 2)>; + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (1209600 * 16 * 2)>; + }; + + opp-1324800000 { + opp-hz = /bits/ 64 <1324800000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (1286400 * 16 * 2)>; + }; + + opp-1516800000 { + opp-hz = /bits/ 64 <1516800000>; + opp-peak-kBps = <(1353000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + }; + + cpu6_opp_table: opp-table-cpu6 { + compatible = "operating-points-v2"; + opp-shared; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <(200000 * 4 * 2 * 2) (300000 * 16 * 2)>; + }; + + opp-787200000 { + opp-hz = /bits/ 64 <787200000>; + opp-peak-kBps = <(768000 * 4 * 2 * 2) (652800 * 16 * 2)>; + }; + + opp-979200000 { + opp-hz = /bits/ 64 <979200000>; + opp-peak-kBps = <(768000 * 4 * 2 * 2) (940800 * 16 * 2)>; + }; + + opp-1036800000 { + opp-hz = /bits/ 64 <1036800000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (940800 * 16 * 2)>; + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-peak-kBps = <(1017000 * 4 * 2 * 2) (1209600 * 16 * 2)>; + }; + + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; + opp-peak-kBps = <(1353000 * 4 * 2 * 2) (1401600 * 16 * 2)>; + }; + + opp-1555200000 { + opp-hz = /bits/ 64 <1555200000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1766400000 { + opp-hz = /bits/ 64 <1766400000>; + opp-peak-kBps = <(1555000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-1900800000 { + opp-hz = /bits/ 64 <1900800000>; + opp-peak-kBps = <(1804000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-2073600000 { + opp-hz = /bits/ 64 <2073600000>; + opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; diff --git a/arch/arm64/boot/dts/qcom/sm7225.dtsi b/arch/arm64/boot/dts/qcom/sm7225.dtsi index 7b2a002ca7ff..b7b4044e9bb0 100644 --- a/arch/arm64/boot/dts/qcom/sm7225.dtsi +++ b/arch/arm64/boot/dts/qcom/sm7225.dtsi @@ -14,3 +14,22 @@ &CPU5 { compatible = "qcom,kryo570"; }; &CPU6 { compatible = "qcom,kryo570"; }; &CPU7 { compatible = "qcom,kryo570"; }; + +&cpu0_opp_table { + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; + opp-peak-kBps = <(1804000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; +}; + +&cpu6_opp_table { + opp-2131200000 { + opp-hz = /bits/ 64 <2131200000>; + opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; + + opp-2208000000 { + opp-hz = /bits/ 64 <2208000000>; + opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>; + }; +};