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Mon, 19 Dec 2022 06:41:14 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT101.mail.protection.outlook.com (10.13.172.208) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5924.16 via Frontend Transport; Mon, 19 Dec 2022 06:41:14 +0000 Received: from pyuan-Cloudripper.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Mon, 19 Dec 2022 00:41:10 -0600 From: Perry Yuan To: , , , CC: , , , , , , , , Subject: [PATCH v8 03/13] cpufreq: intel_pstate: use common macro definition for Energy Preference Performance(EPP) Date: Mon, 19 Dec 2022 14:40:32 +0800 Message-ID: <20221219064042.661122-4-perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221219064042.661122-1-perry.yuan@amd.com> References: <20221219064042.661122-1-perry.yuan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT101:EE_|DM4PR12MB6664:EE_ X-MS-Office365-Filtering-Correlation-Id: 28c77821-82d4-4a1f-8c04-08dae18c0657 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Dec 2022 06:41:14.3793 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28c77821-82d4-4a1f-8c04-08dae18c0657 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT101.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6664 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org make the energy preference performance strings and profiles using one common header for intel_pstate driver, then the amd_pstate epp driver can use the common header as well. This will simpify the intel_pstate and amd_pstate driver. Signed-off-by: Perry Yuan --- drivers/cpufreq/intel_pstate.c | 13 +++---------- include/linux/cpufreq.h | 11 +++++++++++ 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index ad9be31753b6..93a60fdac0fc 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -640,15 +640,7 @@ static int intel_pstate_set_epb(int cpu, s16 pref) * 4 power */ -enum energy_perf_value_index { - EPP_INDEX_DEFAULT = 0, - EPP_INDEX_PERFORMANCE, - EPP_INDEX_BALANCE_PERFORMANCE, - EPP_INDEX_BALANCE_POWERSAVE, - EPP_INDEX_POWERSAVE, -}; - -static const char * const energy_perf_strings[] = { +const char * const energy_perf_strings[] = { [EPP_INDEX_DEFAULT] = "default", [EPP_INDEX_PERFORMANCE] = "performance", [EPP_INDEX_BALANCE_PERFORMANCE] = "balance_performance", @@ -656,7 +648,8 @@ static const char * const energy_perf_strings[] = { [EPP_INDEX_POWERSAVE] = "power", NULL }; -static unsigned int epp_values[] = { + +unsigned int epp_values[] = { [EPP_INDEX_DEFAULT] = 0, /* Unused index */ [EPP_INDEX_PERFORMANCE] = HWP_EPP_PERFORMANCE, [EPP_INDEX_BALANCE_PERFORMANCE] = HWP_EPP_BALANCE_PERFORMANCE, diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index d5595d57f4e5..e63309d497fe 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -20,6 +20,7 @@ #include #include #include +#include /********************************************************************* * CPUFREQ INTERFACE * @@ -185,6 +186,16 @@ struct cpufreq_freqs { u8 flags; /* flags of cpufreq_driver, see below. */ }; +enum energy_perf_value_index { + EPP_INDEX_DEFAULT = 0, + EPP_INDEX_PERFORMANCE, + EPP_INDEX_BALANCE_PERFORMANCE, + EPP_INDEX_BALANCE_POWERSAVE, + EPP_INDEX_POWERSAVE, +}; +extern const char * const energy_perf_strings[]; +extern unsigned int epp_values[]; + /* Only for ACPI */ #define CPUFREQ_SHARED_TYPE_NONE (0) /* None */ #define CPUFREQ_SHARED_TYPE_HW (1) /* HW does needed coordination */