Message ID | 20221118133216.17037-5-walker.chen@starfivetech.com |
---|---|
State | Superseded |
Headers | show |
Series | JH7110 Power Domain Support | expand |
On Wed, 23 Nov 2022 at 03:12, Walker Chen <walker.chen@starfivetech.com> wrote: > > On 2022/11/19 2:36, Emil Renner Berthing wrote: > > On Fri, 18 Nov 2022 at 14:35, Walker Chen <walker.chen@starfivetech.com> wrote: > >> > >> This adds the power controller node for the Starfive JH7110 SoC. > >> The pmu needs to be used by other modules such as ISP, VPU, etc. > >> > >> Signed-off-by: Walker Chen <walker.chen@starfivetech.com> > > > > Hi Walker, > > > > You called the driver jh71xx which suggests it also applies to the > > jh7100. Are you missing a node in the jh7100 device tree? > > No, there is no power domain controller on the jh7100. Our next generation of chips jh7120 will > still use this power management unit, so here this driver name is called jh71xx_pmu.c or changed > to jh71xx_power.c , do you think such a name is appropriate ? > Your reply will be highly appreciated! I see. In that case jh71xx seems appropriate, thanks. > > > >> --- > >> arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++ > >> 1 file changed, 7 insertions(+) > >> > >> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> index c22e8f1d2640..fa7b60b82d71 100644 > >> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > >> @@ -356,6 +356,13 @@ > >> #gpio-cells = <2>; > >> }; > >> > >> + pwrc: power-controller@17030000 { > >> + compatible = "starfive,jh7110-pmu"; > >> + reg = <0x0 0x17030000 0x0 0x10000>; > >> + interrupts = <111>; > >> + #power-domain-cells = <1>; > >> + }; > >> + > >> uart0: serial@10000000 { > >> compatible = "snps,dw-apb-uart"; > >> reg = <0x0 0x10000000 0x0 0x10000>; > >> -- > >> 2.17.1 > >> > >> > >> _______________________________________________ > >> linux-riscv mailing list > >> linux-riscv@lists.infradead.org > >> http://lists.infradead.org/mailman/listinfo/linux-riscv >
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index c22e8f1d2640..fa7b60b82d71 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -356,6 +356,13 @@ #gpio-cells = <2>; }; + pwrc: power-controller@17030000 { + compatible = "starfive,jh7110-pmu"; + reg = <0x0 0x17030000 0x0 0x10000>; + interrupts = <111>; + #power-domain-cells = <1>; + }; + uart0: serial@10000000 { compatible = "snps,dw-apb-uart"; reg = <0x0 0x10000000 0x0 0x10000>;
This adds the power controller node for the Starfive JH7110 SoC. The pmu needs to be used by other modules such as ISP, VPU, etc. Signed-off-by: Walker Chen <walker.chen@starfivetech.com> --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)