Message ID | 20220709142019.836919-1-Perry.Yuan@amd.com |
---|---|
State | Superseded |
Headers | show
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[v2,01/14] x86/msr: Add the MSR definition for AMD CPPC hardware control.
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diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index 579c851a2bd7..73a8cb31529d 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -352,7 +352,7 @@ void topology_init_cpu_capacity_cppc(void) struct cppc_perf_caps perf_caps; int cpu; - if (likely(acpi_disabled || !acpi_cpc_valid())) + if (likely(!acpi_cpc_valid())) return; raw_capacity = kcalloc(num_possible_cpus(), sizeof(*raw_capacity),
"acpi_cpc_valid" function already includes the acpi_disabled check and we can remove the duplicated check here Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> --- drivers/base/arch_topology.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)