From patchwork Mon May 9 08:48:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: qianfan X-Patchwork-Id: 571175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FBAEC433EF for ; Mon, 9 May 2022 10:23:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231511AbiEIK05 (ORCPT ); Mon, 9 May 2022 06:26:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230061AbiEIK04 (ORCPT ); Mon, 9 May 2022 06:26:56 -0400 X-Greylist: delayed 4582 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Mon, 09 May 2022 03:22:23 PDT Received: from m12-17.163.com (m12-17.163.com [220.181.12.17]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BDD4F1E82D4; Mon, 9 May 2022 03:22:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=Db/iq a+253Uz6WJEAvaq4jwDE9d5l6k1aN989gVLNoc=; b=mFNgGO4UK1QxCfcbBK6Li 7A+PwHlzV7pXmxWpGTAfKK9Q90Mcod3iKYaWfXg6lmKKjDBM0c+wj6UVHzrlOQqU o94FczeRntA+T9ydshi5urP8chudubmbrBMnyyp+PLClbizN66EO4+g7NZIbWx6/ FFExzith2u6eVt8FhZBQs4= Received: from DESKTOP-B1R4FVG.localdomain (unknown [218.201.129.19]) by smtp13 (Coremail) with SMTP id EcCowAC3XVJ11XhiB7GXBg--.12552S2; Mon, 09 May 2022 16:48:54 +0800 (CST) From: qianfanguijin@163.com To: linux-sunxi@lists.linux.dev Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , "Rafael J . Wysocki" , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, qianfan Zhao Subject: [PATCH v1] drivers: cpufreq: sun8i-r40: Add cpufreq support Date: Mon, 9 May 2022 16:48:53 +0800 Message-Id: <20220509084853.17068-1-qianfanguijin@163.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CM-TRANSID: EcCowAC3XVJ11XhiB7GXBg--.12552S2 X-Coremail-Antispam: 1Uf129KBjvJXoWxGF1kJr4DCr13tr1DZw1rCrg_yoW5XFWfpr 4UKayFkF4rWr12vw1aqr40qF1rGa9Y9FW5Jr17C3yxKr90qF90qFyxtFyYkFyDWr17X3yS qrs8tryIkw1kA3DanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0zN9aPUUUUUU= X-Originating-IP: [218.201.129.19] X-CM-SenderInfo: htld0w5dqj3xxmlqqiywtou0bp/xtbCqRT77V0DfTNCMQACsK Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: qianfan Zhao OPP table value is get from allwinner lichee 3.10 kernel. Signed-off-by: qianfan Zhao --- arch/arm/boot/dts/sun8i-r40.dtsi | 47 ++++++++++++++++++++++++++++ drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 2 files changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 291f4784e86c..90de119095fa 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -54,6 +54,41 @@ / { #size-cells = <1>; interrupt-parent = <&gic>; + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1000000 1000000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1100000 1100000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1160000 1160000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1240000 1240000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <2000000>; + }; + }; + clocks { #address-cells = <1>; #size-cells = <1>; @@ -84,24 +119,36 @@ cpu0: cpu@0 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; }; cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; }; cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; }; cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; }; }; diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index ca1d103ec449..971a99219d4d 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -26,6 +26,7 @@ static const struct of_device_id allowlist[] __initconst = { { .compatible = "allwinner,sun8i-a23", }, { .compatible = "allwinner,sun8i-a83t", }, { .compatible = "allwinner,sun8i-h3", }, + { .compatible = "allwinner,sun8i-r40", }, { .compatible = "apm,xgene-shadowcat", },