From patchwork Tue Mar 8 00:09:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 549591 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 362DDC433FE for ; Tue, 8 Mar 2022 00:10:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344025AbiCHALa (ORCPT ); Mon, 7 Mar 2022 19:11:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52620 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344079AbiCHAL2 (ORCPT ); Mon, 7 Mar 2022 19:11:28 -0500 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0ECA37032 for ; Mon, 7 Mar 2022 16:10:23 -0800 (PST) Received: by mail-pf1-x435.google.com with SMTP id z16so15856369pfh.3 for ; Mon, 07 Mar 2022 16:10:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qamn1KXLKkoAp4pJxR8atvIxLoRPmk7xdgGcjv6i0+c=; b=HtNToSVKei4r/dkWdQX0wFF5BeiprqAGBJsdBdObgeljF01tpvu6X37kYjGzVbNni+ WZOVPuhC++u65RvNvI13z38qMqXgqw+SxmFn9G+J1eGwYp92cOQk/pAGGrjwwKQWDFKf /8iwPbKU2kjsHaj0KliCyO3Wyw7yBT0HGo8lI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qamn1KXLKkoAp4pJxR8atvIxLoRPmk7xdgGcjv6i0+c=; b=ZtbncOUy6uZBS617/wRw71e11H/r6U+gQoZaQib28UUPlPSFTcj3po4OcGTI6AFEi5 X0y0jkZkmtiNsUv49apYZsRpfyH6UDX6dntcrucgH08hwDxJRw6Qq4jvGghwwff17yFy TeUhwgiCw8SO33abg0GTqMUCgkfp0JcQLY+Kfga2iPWCCUCagZr72PpnuUO7cANrkr6q 91aQaULW0QgE2mMyT98d5agiN075QRvFx0e0uPDkgO/MozbJBlAFWgNocGqe8f02NxE4 3ghmLrWXmvBO5zMTo/PeLzHunrplxKg2QK3jsCMV/BaDeB1Hqca0UspFxHwsyds6N0qy Gxrg== X-Gm-Message-State: AOAM533sntysez8OR7LMMtDgOo4orzwwkQDjgCWpPxWhVi64S6vUuNbl oI70/toAJ0ytaJDNvItjbEgZ/g== X-Google-Smtp-Source: ABdhPJzGV5UoWWEbvE82QJSgvp/hXpji18fWii897O93/NS3Ey5zWslK5hn5QEXo88Kr410ZN/GnIg== X-Received: by 2002:aa7:8432:0:b0:4f6:6dcd:4f19 with SMTP id q18-20020aa78432000000b004f66dcd4f19mr15511216pfn.53.1646698222537; Mon, 07 Mar 2022 16:10:22 -0800 (PST) Received: from localhost ([2620:15c:202:201:e551:44dc:2842:57f1]) by smtp.gmail.com with UTF8SMTPSA id b62-20020a633441000000b0037c794cb68fsm11455025pga.9.2022.03.07.16.10.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Mar 2022 16:10:22 -0800 (PST) From: Brian Norris To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Rob Herring Cc: Lin Huang , Heiko Stuebner , Derek Basehore , linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Brian Norris Subject: [PATCH v3 08/15] PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD Date: Mon, 7 Mar 2022 16:09:38 -0800 Message-Id: <20220307160918.v3.8.I0f36da588afd01d0dc9ce5866240efa34bd91e21@changeid> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308000945.706701-1-briannorris@chromium.org> References: <20220308000945.706701-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We're going to add new usages, and it's cleaner to work with macros instead of comments and magic numbers. Signed-off-by: Brian Norris --- (no changes since v1) drivers/devfreq/rk3399_dmc.c | 43 ++++++++++++++++++++---------------- 1 file changed, 24 insertions(+), 19 deletions(-) diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c index 8f447217303f..c4efbc15cbb1 100644 --- a/drivers/devfreq/rk3399_dmc.c +++ b/drivers/devfreq/rk3399_dmc.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -23,6 +24,15 @@ #include #include +#define RK3399_SET_ODT_PD_0_SR_IDLE GENMASK(7, 0) +#define RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE GENMASK(15, 8) +#define RK3399_SET_ODT_PD_0_STANDBY_IDLE GENMASK(31, 16) + +#define RK3399_SET_ODT_PD_1_PD_IDLE GENMASK(11, 0) +#define RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE GENMASK(27, 16) + +#define RK3399_SET_ODT_PD_2_ODT_ENABLE BIT(0) + struct rk3399_dmcfreq { struct device *dev; struct devfreq *devfreq; @@ -55,7 +65,6 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, unsigned long old_clk_rate = dmcfreq->rate; unsigned long target_volt, target_rate; struct arm_smccc_res res; - bool odt_enable = false; int err; opp = devfreq_recommended_opp(dev, freq, flags); @@ -72,8 +81,10 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, mutex_lock(&dmcfreq->lock); if (dmcfreq->regmap_pmu) { + unsigned int odt_pd_arg2 = 0; + if (target_rate >= dmcfreq->odt_dis_freq) - odt_enable = true; + odt_pd_arg2 |= RK3399_SET_ODT_PD_2_ODT_ENABLE; /* * This makes a SMC call to the TF-A to set the DDR PD @@ -83,7 +94,7 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0, dmcfreq->odt_pd_arg1, ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD, - odt_enable, 0, 0, 0, &res); + odt_pd_arg2, 0, 0, 0, &res); } /* @@ -316,23 +327,17 @@ static int rk3399_dmcfreq_probe(struct platform_device *pdev) /* * In TF-A there is a platform SIP call to set the PD (power-down) * timings and to enable or disable the ODT (on-die termination). - * This call needs three arguments as follows: - * - * arg0: - * bit[0-7] : sr_idle - * bit[8-15] : sr_mc_gate_idle - * bit[16-31] : standby idle - * arg1: - * bit[0-11] : pd_idle - * bit[16-27] : srpd_lite_idle - * arg2: - * bit[0] : odt enable */ - data->odt_pd_arg0 = (data->sr_idle & 0xff) | - ((data->sr_mc_gate_idle & 0xff) << 8) | - ((data->standby_idle & 0xffff) << 16); - data->odt_pd_arg1 = (data->pd_idle & 0xfff) | - ((data->srpd_lite_idle & 0xfff) << 16); + data->odt_pd_arg0 = + FIELD_PREP(RK3399_SET_ODT_PD_0_SR_IDLE, data->sr_idle) | + FIELD_PREP(RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE, + data->sr_mc_gate_idle) | + FIELD_PREP(RK3399_SET_ODT_PD_0_STANDBY_IDLE, + data->standby_idle); + data->odt_pd_arg1 = + FIELD_PREP(RK3399_SET_ODT_PD_1_PD_IDLE, data->pd_idle) | + FIELD_PREP(RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE, + data->srpd_lite_idle); /* * We add a devfreq driver to our parent since it has a device tree node