From patchwork Tue Mar 8 00:09:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 549593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80394C43219 for ; Tue, 8 Mar 2022 00:10:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343988AbiCHALI (ORCPT ); Mon, 7 Mar 2022 19:11:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241643AbiCHALH (ORCPT ); Mon, 7 Mar 2022 19:11:07 -0500 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5578E37032 for ; Mon, 7 Mar 2022 16:10:11 -0800 (PST) Received: by mail-pl1-x62a.google.com with SMTP id p17so15505931plo.9 for ; Mon, 07 Mar 2022 16:10:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RSPb7Rmvn1OssvKJPI0IziSzIIo2sB3qARwOV39ea0I=; b=WuLu8YOSGE1ta2mDFwulhG3aPQDCgYWhDUrgBB10XJ4QJTkxjbycGlgaSBdUmT4+mU jzJTCavo8aPeFfGU2zwHDchA9/MpyV2HKKu5iLHXaDMvPxe+bZasZt6nQnnXNUm/ao/0 iWFBSjEbIwHr4af/8l/B/tEaZL51BXr7x9Bi0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RSPb7Rmvn1OssvKJPI0IziSzIIo2sB3qARwOV39ea0I=; b=PQwsT+zLOnPPsmvxzELLnzqF0amjPKvzj+yHPGyKPMLgiaUdKt9WbdGztiSfz1Iq2D T+bSgr91m+MvM6SNNUrjAMo6QenonEoWh3uw1hEajVjkal2yeIaGUebtdgbsDskIjBf8 kxd4IfcAlgVlD98wOaWwmDwwI0IsNi6v/A5n7QN63KGKLFG7opa8IafnIZfcpwDjAVEQ RVllYst0z7DX4kWPrdtLxUYRjsiz9pEVTiS/UJVh9n7WqTHwzoFO0k7ftT7BAasYDw4B 2sg+0N5/EQ0E4IDA9TIzRh206gvc6gL8ChOBdRHH8QZrINXdvMBQ+7syl8Ye4V/Uwi3K 9YyA== X-Gm-Message-State: AOAM5331Nj6yHGeeyNOBCEIgjlyaqrF6mz5uYRQg0EAILKGDq2mw+Vi+ 7hCGQdar3dSsKCCtJHCGtF/5Yw== X-Google-Smtp-Source: ABdhPJzfXSzb3//ze5F9Dx48P8uYnbv1sjyCOMJmVwH9LznqPfrGy5MvA4GswqU1czunetHj/ks95A== X-Received: by 2002:a17:90b:3503:b0:1bf:27c6:3b33 with SMTP id ls3-20020a17090b350300b001bf27c63b33mr1647788pjb.225.1646698210815; Mon, 07 Mar 2022 16:10:10 -0800 (PST) Received: from localhost ([2620:15c:202:201:e551:44dc:2842:57f1]) by smtp.gmail.com with UTF8SMTPSA id o22-20020a056a0015d600b004f71095ed8dsm3816180pfu.78.2022.03.07.16.10.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Mar 2022 16:10:10 -0800 (PST) From: Brian Norris To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Rob Herring Cc: Lin Huang , Heiko Stuebner , Derek Basehore , linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Brian Norris , Rob Herring Subject: [PATCH v3 03/15] dt-bindings: devfreq: rk3399_dmc: Fix Hz units Date: Mon, 7 Mar 2022 16:09:33 -0800 Message-Id: <20220307160918.v3.3.I9341269171c114d0e04e41d48037fd32816e2d8c@changeid> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308000945.706701-1-briannorris@chromium.org> References: <20220308000945.706701-1-briannorris@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The driver and all downstream device trees [1] are using Hz units, but the document claims MHz. DRAM frequency for these systems can't possibly exceed 2^32-1 Hz, so the choice of unit doesn't really matter than much. Rather than add unnecessary risk in getting the units wrong, let's just go with the unofficial convention and make the docs match reality. A sub-1MHz frequency is extremely unlikely, so include a minimum in the schema, to help catch anybody who might have believed this was MHz. [1] And notably, also those trying to upstream them: https://lore.kernel.org/lkml/20210308233858.24741-3-daniel.lezcano@linaro.org/ Signed-off-by: Brian Norris Reviewed-by: Rob Herring Acked-by: Chanwoo Choi --- Changes in v3: * Add Reviewed-by, Acked-by .../bindings/devfreq/rk3399_dmc.yaml | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml index 4ca43b76ed51..2904ae4115f3 100644 --- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml @@ -117,11 +117,11 @@ properties: rockchip,ddr3_odt_dis_freq: $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1000000 # In case anyone thought this was MHz. description: When the DRAM type is DDR3, this parameter defines the ODT disable - frequency in MHz (Mega Hz). When the DDR frequency is less then - ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both - disabled. + frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq, + the ODT on the DRAM side and controller side are both disabled. rockchip,ddr3_drv: deprecated: true @@ -161,11 +161,11 @@ properties: rockchip,lpddr3_odt_dis_freq: $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1000000 # In case anyone thought this was MHz. description: When the DRAM type is LPDDR3, this parameter defines then ODT disable - frequency in MHz (Mega Hz). When DDR frequency is less then - ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both - disabled. + frequency in Hz. When DDR frequency is less then ddr3_odt_dis_freq, the + ODT on the DRAM side and controller side are both disabled. rockchip,lpddr3_drv: deprecated: true @@ -205,11 +205,11 @@ properties: rockchip,lpddr4_odt_dis_freq: $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1000000 # In case anyone thought this was MHz. description: When the DRAM type is LPDDR4, this parameter defines the ODT disable - frequency in MHz (Mega Hz). When the DDR frequency is less then - ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both - disabled. + frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq, + the ODT on the DRAM side and controller side are both disabled. rockchip,lpddr4_drv: deprecated: true @@ -288,7 +288,7 @@ examples: rockchip,sr_mc_gate_idle = <0x3>; rockchip,srpd_lite_idle = <0x4>; rockchip,standby_idle = <0x2000>; - rockchip,ddr3_odt_dis_freq = <333>; - rockchip,lpddr3_odt_dis_freq = <333>; - rockchip,lpddr4_odt_dis_freq = <333>; + rockchip,ddr3_odt_dis_freq = <333000000>; + rockchip,lpddr3_odt_dis_freq = <333000000>; + rockchip,lpddr4_odt_dis_freq = <333000000>; };