From patchwork Mon Feb 21 06:39:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Lu X-Patchwork-Id: 544591 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A52BC433EF for ; Mon, 21 Feb 2022 06:41:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345408AbiBUGlU (ORCPT ); Mon, 21 Feb 2022 01:41:20 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:41296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345330AbiBUGkn (ORCPT ); Mon, 21 Feb 2022 01:40:43 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D01242EE7; Sun, 20 Feb 2022 22:39:45 -0800 (PST) X-UUID: 7741669706984a78b78209217d62925e-20220221 X-UUID: 7741669706984a78b78209217d62925e-20220221 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1425580699; Mon, 21 Feb 2022 14:39:41 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 21 Feb 2022 14:39:40 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 21 Feb 2022 14:39:40 +0800 From: Roger Lu To: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd , Philipp Zabel CC: Fan Chen , HenryC Chen , Xiaoqing Liu , Charles Yang , Angus Lin , Mark Rutland , Nishanth Menon , Roger Lu , , , , , , , Guenter Roeck , Jia-wei Chang Subject: [PATCH v23 6/7] dt-bindings: soc: mediatek: add mt8192 svs dt-bindings Date: Mon, 21 Feb 2022 14:39:38 +0800 Message-ID: <20220221063939.14969-7-roger.lu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220221063939.14969-1-roger.lu@mediatek.com> References: <20220221063939.14969-1-roger.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add mt8192 svs compatible/resets in dt-bindings. Signed-off-by: Roger Lu Reviewed-by: Rob Herring Reviewed-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/soc/mediatek/mtk-svs.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml index dfd275f4973c..eecfec13ee8b 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml @@ -22,6 +22,7 @@ properties: compatible: enum: - mediatek,mt8183-svs + - mediatek,mt8192-svs reg: maxItems: 1 @@ -50,6 +51,13 @@ properties: - const: svs-calibration-data - const: t-calibration-data + resets: + maxItems: 1 + + reset-names: + items: + - const: svs_rst + required: - compatible - reg