diff mbox series

[v6,08/12] power: supply: smb347-charger: Add missing pin control activation

Message ID 20210731173842.19643-9-digetx@gmail.com
State Accepted
Commit efe2175478d5237949e33c84d9a722fc084b218c
Headers show
Series Add OTG mode support to Tegra USB PHY, SMB347 and Nexus 7 | expand

Commit Message

Dmitry Osipenko July 31, 2021, 5:38 p.m. UTC
Pin control needs to be activated by setting the enable bit, otherwise
hardware rejects all pin changes. Previously this stayed unnoticed on
Nexus 7 because pin control was enabled by default after rebooting from
downstream kernel, which uses driver that enables the bit and charger
registers are non-volatile until power supply (battery) is disconnected.
Configure the pin control enable bit. This fixes the potentially
never-enabled charging on devices that use pin control.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/power/supply/smb347-charger.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Sebastian Reichel Aug. 6, 2021, 9:13 p.m. UTC | #1
Hi,

On Sat, Jul 31, 2021 at 08:38:38PM +0300, Dmitry Osipenko wrote:
> Pin control needs to be activated by setting the enable bit, otherwise
> hardware rejects all pin changes. Previously this stayed unnoticed on
> Nexus 7 because pin control was enabled by default after rebooting from
> downstream kernel, which uses driver that enables the bit and charger
> registers are non-volatile until power supply (battery) is disconnected.
> Configure the pin control enable bit. This fixes the potentially
> never-enabled charging on devices that use pin control.
> 
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>

-- Sebastian

>  drivers/power/supply/smb347-charger.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/power/supply/smb347-charger.c b/drivers/power/supply/smb347-charger.c
> index 27254e6efdde..1c9205ca0993 100644
> --- a/drivers/power/supply/smb347-charger.c
> +++ b/drivers/power/supply/smb347-charger.c
> @@ -55,6 +55,7 @@
>  #define CFG_PIN_EN_CTRL_ACTIVE_LOW		0x60
>  #define CFG_PIN_EN_APSD_IRQ			BIT(1)
>  #define CFG_PIN_EN_CHARGER_ERROR		BIT(2)
> +#define CFG_PIN_EN_CTRL				BIT(4)
>  #define CFG_THERM				0x07
>  #define CFG_THERM_SOFT_HOT_COMPENSATION_MASK	0x03
>  #define CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT	0
> @@ -726,6 +727,15 @@ static int smb347_hw_init(struct smb347_charger *smb)
>  	if (ret < 0)
>  		goto fail;
>  
> +	/* Activate pin control, making it writable. */
> +	switch (smb->enable_control) {
> +	case SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW:
> +	case SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH:
> +		ret = regmap_set_bits(smb->regmap, CFG_PIN, CFG_PIN_EN_CTRL);
> +		if (ret < 0)
> +			goto fail;
> +	}
> +
>  	/*
>  	 * Make the charging functionality controllable by a write to the
>  	 * command register unless pin control is specified in the platform
> -- 
> 2.32.0
>
diff mbox series

Patch

diff --git a/drivers/power/supply/smb347-charger.c b/drivers/power/supply/smb347-charger.c
index 27254e6efdde..1c9205ca0993 100644
--- a/drivers/power/supply/smb347-charger.c
+++ b/drivers/power/supply/smb347-charger.c
@@ -55,6 +55,7 @@ 
 #define CFG_PIN_EN_CTRL_ACTIVE_LOW		0x60
 #define CFG_PIN_EN_APSD_IRQ			BIT(1)
 #define CFG_PIN_EN_CHARGER_ERROR		BIT(2)
+#define CFG_PIN_EN_CTRL				BIT(4)
 #define CFG_THERM				0x07
 #define CFG_THERM_SOFT_HOT_COMPENSATION_MASK	0x03
 #define CFG_THERM_SOFT_HOT_COMPENSATION_SHIFT	0
@@ -726,6 +727,15 @@  static int smb347_hw_init(struct smb347_charger *smb)
 	if (ret < 0)
 		goto fail;
 
+	/* Activate pin control, making it writable. */
+	switch (smb->enable_control) {
+	case SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW:
+	case SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH:
+		ret = regmap_set_bits(smb->regmap, CFG_PIN, CFG_PIN_EN_CTRL);
+		if (ret < 0)
+			goto fail;
+	}
+
 	/*
 	 * Make the charging functionality controllable by a write to the
 	 * command register unless pin control is specified in the platform