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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id n202sm3366180oig.10.2021.07.24.20.00.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Jul 2021 20:00:21 -0700 (PDT) From: Bjorn Andersson To: Georgi Djakov , Sibi Sankar Cc: Rob Herring , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] interconnect: qcom: osm-l3: Add sc8180x support Date: Sat, 24 Jul 2021 19:58:34 -0700 Message-Id: <20210725025834.3941777-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210725025834.3941777-1-bjorn.andersson@linaro.org> References: <20210725025834.3941777-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add support for the Qualcomm SC8180x platform to the OSM L3 driver. Signed-off-by: Bjorn Andersson --- drivers/interconnect/qcom/osm-l3.c | 18 ++++++++++++++++++ drivers/interconnect/qcom/sc8180x.h | 2 ++ 2 files changed, 20 insertions(+) -- 2.29.2 diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index 695f28789e98..13e41b932567 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -15,6 +15,7 @@ #include #include "sc7180.h" +#include "sc8180x.h" #include "sdm845.h" #include "sm8150.h" #include "sm8250.h" @@ -113,6 +114,22 @@ static const struct qcom_icc_desc sc7180_icc_osm_l3 = { .reg_perf_state = OSM_REG_PERF_STATE, }; +DEFINE_QNODE(sc8180x_osm_apps_l3, SC8180X_MASTER_OSM_L3_APPS, 32, SC8180X_SLAVE_OSM_L3); +DEFINE_QNODE(sc8180x_osm_l3, SC8180X_SLAVE_OSM_L3, 32); + +static const struct qcom_icc_node *sc8180x_osm_l3_nodes[] = { + [MASTER_OSM_L3_APPS] = &sc8180x_osm_apps_l3, + [SLAVE_OSM_L3] = &sc8180x_osm_l3, +}; + +static const struct qcom_icc_desc sc8180x_icc_osm_l3 = { + .nodes = sc8180x_osm_l3_nodes, + .num_nodes = ARRAY_SIZE(sc8180x_osm_l3_nodes), + .lut_row_size = OSM_LUT_ROW_SIZE, + .reg_freq_lut = OSM_REG_FREQ_LUT, + .reg_perf_state = OSM_REG_PERF_STATE, +}; + DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3); DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32); @@ -311,6 +328,7 @@ static const struct of_device_id osm_l3_of_match[] = { { .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 }, { .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 }, { .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 }, + { .compatible = "qcom,sc8180x-osm-l3", .data = &sc8180x_icc_osm_l3 }, { .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 }, { } }; diff --git a/drivers/interconnect/qcom/sc8180x.h b/drivers/interconnect/qcom/sc8180x.h index fed2dc2d4acb..e70cf7032f80 100644 --- a/drivers/interconnect/qcom/sc8180x.h +++ b/drivers/interconnect/qcom/sc8180x.h @@ -168,5 +168,7 @@ #define SC8180X_SLAVE_EBI_CH0_DISPLAY 158 #define SC8180X_SLAVE_MNOC_SF_MEM_NOC_DISPLAY 159 #define SC8180X_SLAVE_MNOC_HF_MEM_NOC_DISPLAY 160 +#define SC8180X_MASTER_OSM_L3_APPS 161 +#define SC8180X_SLAVE_OSM_L3 162 #endif