@@ -1344,7 +1344,6 @@ tegra_pmc_core_pd_opp_to_performance_state(struct generic_pm_domain *genpd,
static int tegra_pmc_core_pd_add(struct tegra_pmc *pmc, struct device_node *np)
{
- static struct lock_class_key tegra_core_domain_lock_class;
struct generic_pm_domain *genpd;
const char *rname = "core";
int err;
@@ -1368,15 +1367,6 @@ static int tegra_pmc_core_pd_add(struct tegra_pmc *pmc, struct device_node *np)
return err;
}
- /*
- * We have a "PMC pwrgate -> Core" hierarchy of the power domains
- * where PMC needs to resume and change performance (voltage) of the
- * Core domain from the PMC GENPD on/off callbacks, hence we need
- * to annotate the lock in order to remove confusion from the
- * lockdep checker when a nested access happens.
- */
- lockdep_set_class(&genpd->mlock, &tegra_core_domain_lock_class);
-
err = of_genpd_add_provider_simple(np, genpd);
if (err) {
dev_err(pmc->dev, "failed to add core genpd: %d\n", err);
The lockdep_set_class() will become necessary only if we will have a nested toggling of core / PMC power domains that will happen if we will add RPM and OPP support to Tegra CCF driver. Ulf Hansson has concerns about whether this is the best approach. He suggested to remove the lockdep class annotation until we will agree on how the OPP support of clocks should be implemented, hence remove it for now. Suggested-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/soc/tegra/pmc.c | 10 ---------- 1 file changed, 10 deletions(-)