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Wysocki" , Pavel Machek , Rob Herring Cc: Sandeep Tripathy , Atish Patra , Alistair Francis , Liush , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Anup Patel Subject: [RFC PATCH v4 4/8] RISC-V: Add SBI HSM suspend related defines Date: Mon, 17 May 2021 18:38:19 +0530 Message-Id: <20210517130823.796963-5-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517130823.796963-1-anup.patel@wdc.com> References: <20210517130823.796963-1-anup.patel@wdc.com> X-Originating-IP: [122.179.32.240] X-ClientProxiedBy: MA1PR0101CA0024.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:21::34) To CO6PR04MB7812.namprd04.prod.outlook.com (2603:10b6:303:138::6) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (122.179.32.240) by MA1PR0101CA0024.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:21::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend Transport; Mon, 17 May 2021 13:09:56 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 15823ea9-349b-4d6f-cfe4-08d919351912 X-MS-TrafficTypeDiagnostic: CO6PR04MB7778: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:220; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: EYc76wK8qhpqGTrcKR9+vck86bB2eGOnEtx3lYN06bu9i3mQBzQvMza6zOk9iDGZQcpn9m+Zn6PdemKQduO7Y9Cr3YGg/Qtn+oK7s/H3YM85LXW1X8GZrVN0A3WM+DXYBQa8+goVahfuuCHU20VA92DGSUVm4d/9qKOU6f3Xqnm/4pQ2Ehfm+uSchcn4ezvQGCfdo2+MP4LG38IoGoQqJrPWn0KgiDIL9ucRmT9296JjSVXwTgIFG/9J+mO7n+qa7P9VDAt1XGFjW5PrKHjA94a7jmb8M1XBfUFqEnm/Rnt30XRRkaAXKRcafpCxlb16zS+MIuzdI2qKn3lj11ucSWipHvyLZS4I6h6qBH32+Ok7CaajtTOD1ZFqFliLyqLjK9+Z4eooKz/yxmQzV2Rlpa6QLEzULyH+xG40tWML4qqJqf7O0toZ/cpjHAsC1wQRSw270aDAm1M0ifly3ZSlCGKa79trO3MzVtlV78eJXySiqSo+B9SLugq1FzkEW7CSLJzA/H1rllNHShpsyJ4moa2WawbnccLtol2AcZtdkiybtRPDCYlThUcDnExh4RUQDS3I7dRXo50OQyTV1k64tavNRbSx8RyIIBbcVtzidYoWrgJczoomMSgNikveD94FBSLQsce6WYoSGX0kCKWg3gLV9MIgBLdSQjK+0UTfReI= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:CO6PR04MB7812.namprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(39850400004)(396003)(346002)(136003)(376002)(15650500001)(83380400001)(38100700002)(6666004)(1076003)(26005)(8886007)(66946007)(44832011)(86362001)(38350700002)(316002)(4326008)(55016002)(2616005)(956004)(52116002)(7696005)(110136005)(54906003)(478600001)(8936002)(8676002)(186003)(7416002)(16526019)(66556008)(66476007)(2906002)(36756003)(5660300002); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData: vQi3HD2upGpq3QD46dNSvOAvJTdenCxKtH2IxtoWlbnPU2/tyZMGiu6e+sKMldsO2H5O2j5XQTNzRTo/qLCpDf7FZ8gCKEF2lxZguT5RUbLlOdH/6tddwIPUYQh/w98dyrhUGuRp54RvkDpSH8UY8uN/neX4n9O2an5sMiLTELrgG+dqQ8w28leEqloBJGVp0JEl+5v7zn3BvjeGxoM54W65GvPDlE7LFmDCLM7nbu3GkEWuMnpd9rCP88ztUPPkMM+GipoxehnUISz3Rq7g+QQeCr/oDoYrNYWNHvajmeVxJcP2I36Y25Ifr2lPzh0OYOsrApuMWU3z6utPhEPWxpN1xnPImLesQN93idgZA01ARES4UkIpzF+1yca+BwOXIOGIav+PKb/RVXdp7a9w1GDLJiKHrJB+cT8+qnWA8cELDITlBb56aycX2fjaSorPXvaKWC4FY7ZK+PnG4LhPfSxRNZ2G3T4qrYuwHtRBLbgdMNCpDuRseF/Ahqr6+5W0xy5XgSeQXLg4OZUdMhiwhygC7c7pfcn3y95TUP1WRx3hfZ1ClDboCiJCBy66d2DkYuoqx7X1zj5CUMnbZLrlYSin3dredBcAaESsaEwPjkJrjVRAW6hJPPYIO6ORZ3ntSibPIi3YhzGgJnqx76awmt4/39dlcp6gDl9GXOD/J+qILhbQqwWnY2zAkyEBfeBiRPczI7fcOejvEkAdduis5jgud9W4YEVZIV0xzofPfWgzLH6sD8IuEmnM4pptye/8Toj1NQSQGrV7rL/gK+5+dShb8gIMn9ofFp6EEr283ajZENPCqOoTx3T5XsmemBn7Y4RWOrp87t0luPSgl8RiALx4qUoSfLLJXZsK0NWTArBYVZeXw3TgKDe/2IhQfvC1UkSzl2wNWM5QeTarQMtLs16UbFbI6bygIi9zKkmcbb+w4+ZbMe7c45ThOP1orUjJfOnQk8FTLkhvbjnGKqmeIjiai1lcsiv83GugmSUfGvMPmi+G3dwJul5P2qUDEl6BGwincNZh4V/47rFOdwUZq7JlfB0u+vsQrtWGrUwBhAcz0Cenp17vcDgbeflFVUwYMMt+L9Hg/Wi3oWUmpQd2sUW4SiZLiUCyPaqKM5I1w5qzr0NaVF6d4VCq6hGTW+EO5Qy6w+i5jVByxem4ALDcU4/NAXvTghR1tlM/YnmqqcY+DFrUHT1pXYqfYxDwLH6l6jl83WJyg9fJOCYv/JgkmFC5756/VfKgG7L6l6fEfnaIupWFbxcTdCydbeICUkZSB91P0qkujLborMttN9Yui3kz7SU+AtojrRjvwRksX66WxuTSnEs8UCVS+4czBtAR X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 15823ea9-349b-4d6f-cfe4-08d919351912 X-MS-Exchange-CrossTenant-AuthSource: CO6PR04MB7812.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 May 2021 13:10:09.6968 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 0ZDKPJENpOkLrmtkzkJlbStDlIee4J19QwU320vSKemfqchtxBmQQbFtVmtOTpO/Gwq3LkQ/9USfHpoNN9XgBA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR04MB7778 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We add defines related to SBI HSM suspend call and also update HSM states naming as-per latest SBI specification. Signed-off-by: Anup Patel --- arch/riscv/include/asm/sbi.h | 27 ++++++++++++++++++++++----- arch/riscv/kernel/cpu_ops_sbi.c | 2 +- 2 files changed, 23 insertions(+), 6 deletions(-) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 289621da4a2a..ab9782f8da52 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -62,15 +62,32 @@ enum sbi_ext_hsm_fid { SBI_EXT_HSM_HART_START = 0, SBI_EXT_HSM_HART_STOP, SBI_EXT_HSM_HART_STATUS, + SBI_EXT_HSM_HART_SUSPEND, }; -enum sbi_hsm_hart_status { - SBI_HSM_HART_STATUS_STARTED = 0, - SBI_HSM_HART_STATUS_STOPPED, - SBI_HSM_HART_STATUS_START_PENDING, - SBI_HSM_HART_STATUS_STOP_PENDING, +enum sbi_hsm_hart_state { + SBI_HSM_STATE_STARTED = 0, + SBI_HSM_STATE_STOPPED, + SBI_HSM_STATE_START_PENDING, + SBI_HSM_STATE_STOP_PENDING, + SBI_HSM_STATE_SUSPENDED, + SBI_HSM_STATE_SUSPEND_PENDING, + SBI_HSM_STATE_RESUME_PENDING, }; +#define SBI_HSM_SUSP_BASE_MASK 0x7fffffff +#define SBI_HSM_SUSP_NON_RET_BIT 0x80000000 +#define SBI_HSM_SUSP_PLAT_BASE 0x10000000 + +#define SBI_HSM_SUSPEND_RET_DEFAULT 0x00000000 +#define SBI_HSM_SUSPEND_RET_PLATFORM SBI_HSM_SUSP_PLAT_BASE +#define SBI_HSM_SUSPEND_RET_LAST SBI_HSM_SUSP_BASE_MASK +#define SBI_HSM_SUSPEND_NON_RET_DEFAULT SBI_HSM_SUSP_NON_RET_BIT +#define SBI_HSM_SUSPEND_NON_RET_PLATFORM (SBI_HSM_SUSP_NON_RET_BIT | \ + SBI_HSM_SUSP_PLAT_BASE) +#define SBI_HSM_SUSPEND_NON_RET_LAST (SBI_HSM_SUSP_NON_RET_BIT | \ + SBI_HSM_SUSP_BASE_MASK) + enum sbi_ext_srst_fid { SBI_EXT_SRST_RESET = 0, }; diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c index 685fae72b7f5..5fd90f03a3e9 100644 --- a/arch/riscv/kernel/cpu_ops_sbi.c +++ b/arch/riscv/kernel/cpu_ops_sbi.c @@ -97,7 +97,7 @@ static int sbi_cpu_is_stopped(unsigned int cpuid) rc = sbi_hsm_hart_get_status(hartid); - if (rc == SBI_HSM_HART_STATUS_STOPPED) + if (rc == SBI_HSM_STATE_STOPPED) return 0; return rc; }