| Message ID | 20201203192439.16177-2-digetx@gmail.com |
|---|---|
| State | Accepted |
| Commit | 9bd5773e02d174dfab3c336fc43d18ec15afc5a3 |
| Headers | show |
| Series | Introduce memory interconnect for NVIDIA Tegra SoCs | expand |
On Thu, 03 Dec 2020 22:24:30 +0300, Dmitry Osipenko wrote: > Document opp-supported-hw property, which is not strictly necessary to > have on Tegra20, but it's very convenient to have because all other SoC > core devices will use hardware versioning, and thus, it's good to maintain > the consistency. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > .../bindings/memory-controllers/nvidia,tegra20-emc.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt index 67ac8d1297da..cc443fcf4bec 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt @@ -16,6 +16,12 @@ Properties: - #interconnect-cells : Should be 0. - operating-points-v2: See ../bindings/opp/opp.txt for details. +For each opp entry in 'operating-points-v2' table: +- opp-supported-hw: One bitfield indicating SoC process ID mask + + A bitwise AND is performed against this value and if any bit + matches, the OPP gets enabled. + Optional properties: - core-supply: Phandle of voltage regulator of the SoC "core" power domain.
Document opp-supported-hw property, which is not strictly necessary to have on Tegra20, but it's very convenient to have because all other SoC core devices will use hardware versioning, and thus, it's good to maintain the consistency. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- .../bindings/memory-controllers/nvidia,tegra20-emc.txt | 6 ++++++ 1 file changed, 6 insertions(+)