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[209.132.180.67]) by mx.google.com with ESMTP id x13si5124329pga.2.2019.04.04.20.55.20; Thu, 04 Apr 2019 20:55:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EkgWa3lL; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730115AbfDEDzT (ORCPT + 11 others); Thu, 4 Apr 2019 23:55:19 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:40863 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730103AbfDEDzS (ORCPT ); Thu, 4 Apr 2019 23:55:18 -0400 Received: by mail-lj1-f196.google.com with SMTP id q66so3966160ljq.7 for ; Thu, 04 Apr 2019 20:55:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=l/1mlm+04wVwhtMiLlTVCrPwXOYS7toZlKWNXa22sNE=; b=EkgWa3lLKtEbOWlu8Y6elZvv7Rih+xNWefGGDTvXZv24SRVRyvlst4xZHCm/hKMYG5 KZfHjRfGbdkNd8kf14OQr8LP6YPhUjHvF5Ld34ZE9fgD7wadH35eFCoVaqL4AXoPKgfX UEcFfQE/TpJGtLzx2/xYR16QzTWEUbLPW+J/DsLJIxpJyC8Ap2sBUFLt+9z1HktZg3EJ mQPRywevhOVE12HTkFCFHNuuLNV6y5h85KO0wE8Fgiw0ec43kpT/F59BhIfPM1XU7Q9R W9bzttvLLe8QtlqRQN+WjEexzToeD36TPx4EHNoswOc7XXh3TCnqBj0wN5qUoq4uNbm+ 0WBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l/1mlm+04wVwhtMiLlTVCrPwXOYS7toZlKWNXa22sNE=; b=F2OAMDjY7NHdJngMkKJmKKPJ3SjwoNaa9ArRpU9b++zwY1zktWCJHcP7SUUI6PjDdA T5brVi/+KBVyEHg/mHiarjFfJV+E5jEBLHkRehmyObtLr6zblfsxivlf3NcylkkLehJX PogSuiYdwd0qFZTtrgVPgb7UnpFIclfm/VtIKmzl8+EDMnKEIu0RjuNzG4T03TQ6dR7t byBVHyqL4c61XmsTXZ0Lkk6WWoV53OuTtPm+wCdNRCPe07710PUWXRTrgvAm07W+wZFC 6VYkrgYqPtvV9JTdkf5xDw6JcLY0UoCs4FWRz1mZjTVzQIyyTncVmWvu+2VkbIfwoR7f GGZw== X-Gm-Message-State: APjAAAXdC0jXZke6HPfe8Xv7Ffv1Xn7z7U0NKS/0eYXMT89HEdZxgexr McbHWpcxahxkypvn5ehzirvyqQ== X-Received: by 2002:a2e:711a:: with SMTP id m26mr5522243ljc.40.1554436516470; Thu, 04 Apr 2019 20:55:16 -0700 (PDT) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id i24sm4417633ljb.31.2019.04.04.20.55.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 04 Apr 2019 20:55:15 -0700 (PDT) From: Georgi Djakov To: robh+dt@kernel.org, georgi.djakov@linaro.org Cc: bjorn.andersson@linaro.org, vkoul@kernel.org, evgreen@chromium.org, daidavid1@codeaurora.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: qcs404: Add interconnect provider DT nodes Date: Fri, 5 Apr 2019 10:54:46 +0700 Message-Id: <20190405035446.31886-4-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190405035446.31886-1-georgi.djakov@linaro.org> References: <20190405035446.31886-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add the DT nodes for the network-on-chip interconnect buses found on qcs404-based platforms. Signed-off-by: Georgi Djakov --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index e8fd26633d57..706e918f79f6 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018, Linaro Limited +#include #include #include #include @@ -226,6 +227,30 @@ compatible = "qcom,rpm-qcs404"; qcom,glink-channels = "rpm_requests"; + bimc: interconnect@0 { + compatible = "qcom,qcs404-bimc"; + #interconnect-cells = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + }; + + pcnoc: interconnect@1 { + compatible = "qcom,qcs404-pcnoc"; + #interconnect-cells = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_PNOC_CLK>, + <&rpmcc RPM_SMD_PNOC_A_CLK>; + }; + + snoc: interconnect@2 { + compatible = "qcom,qcs404-snoc"; + #interconnect-cells = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + }; + rpmcc: clock-controller { compatible = "qcom,rpmcc-qcs404"; #clock-cells = <1>;