@@ -786,8 +786,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi0: spi@880000 {
@@ -838,8 +840,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi1: spi@884000 {
@@ -890,8 +894,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart2: serial@888000 {
@@ -924,8 +930,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi3: spi@88c000 {
@@ -976,8 +984,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart4: serial@890000 {
@@ -1010,8 +1020,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi5: spi@894000 {
@@ -1077,8 +1089,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi6: spi@a80000 {
@@ -1129,8 +1143,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart7: serial@a84000 {
@@ -1163,8 +1179,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi8: spi@a88000 {
@@ -1215,8 +1233,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
uart9: serial@a8c000 {
@@ -1249,8 +1269,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi10: spi@a90000 {
@@ -1301,8 +1323,10 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
spi11: spi@a94000 {
qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz) Though qup-i2c does not support DVFS, it still needs to vote for a performance state on 'CX' to satisfy the 19.2 Mhz clock frequency requirement. Use 'assigned-performance-states' to pass this information from device tree, and also add the power-domains property to specify the cx power-domain. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)