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[2001:1868:205::9]) by mx.google.com with ESMTPS id v6si3775360qas.137.2014.05.16.01.07.10 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 May 2014 01:07:10 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WlD9C-0002P8-U9; Fri, 16 May 2014 08:05:42 +0000 Received: from mail-pb0-f54.google.com ([209.85.160.54]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WlD8b-0000sH-Tm for linux-arm-kernel@lists.infradead.org; Fri, 16 May 2014 08:05:06 +0000 Received: by mail-pb0-f54.google.com with SMTP id jt11so2266570pbb.41 for ; Fri, 16 May 2014 01:04:44 -0700 (PDT) X-Received: by 10.67.5.233 with SMTP id cp9mr1876937pad.147.1400227484848; Fri, 16 May 2014 01:04:44 -0700 (PDT) Received: from localhost.localdomain ([14.140.216.146]) by mx.google.com with ESMTPSA id gu1sm13108466pbd.0.2014.05.16.01.04.41 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 16 May 2014 01:04:44 -0700 (PDT) From: Chander Kashyap To: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v6 6/6] mcpm: exynos: populate suspend and powered_up callbacks Date: Fri, 16 May 2014 13:33:58 +0530 Message-Id: <1400227438-27155-7-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1400227438-27155-1-git-send-email-chander.kashyap@linaro.org> References: <1400227438-27155-1-git-send-email-chander.kashyap@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140516_010506_025524_3CC67369 X-CRM114-Status: GOOD ( 13.37 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.54 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record Cc: Chander Kashyap , lorenzo.pieralisi@arm.com, daniel.lezcano@linaro.org, rjw@rjwysocki.net, tomasz.figa@gmail.com, Chander Kashyap , kgene.kim@samsung.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: chander.kashyap@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 In order to support cpuidle through mcpm, suspend and powered-up callbacks are required in mcpm platform code. Hence populate the same callbacks. Signed-off-by: Chander Kashyap Signed-off-by: Chander Kashyap --- Changes in v6: None Changes in v5: 1. Add comment to address cache access while c-bit is cleared in SCLTR 2. Make exynos_powered_up static Changes in v4: None Changes in v3: 1. Removed coherency enablement after suspend failure. 2. Use generic function to poweron cpu. changes in v2: 1. Fixed typo: enynos_pmu_cpunr to exynos_pmu_cpunr arch/arm/mach-exynos/mcpm-exynos.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index c6bb3a4..623dfa7 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -253,10 +253,46 @@ static int exynos_power_down_finish(unsigned int cpu, unsigned int cluster) return -ETIMEDOUT; /* timeout */ } +static void exynos_powered_up(void) +{ + unsigned int mpidr, cpu, cluster; + + mpidr = read_cpuid_mpidr(); + cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); + cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); + + arch_spin_lock(&exynos_mcpm_lock); + if (cpu_use_count[cpu][cluster] == 0) + cpu_use_count[cpu][cluster] = 1; + arch_spin_unlock(&exynos_mcpm_lock); +} + +static void exynos_suspend(u64 residency) +{ + unsigned int mpidr, cpunr; + + exynos_power_down(); + + /* + * Execution reaches here only if cpu did not power down. + * Hence roll back the changes done in exynos_power_down function. + * + * CAUTION: "This function requires the stack data to be visible through + * power down and can only be executed on processors like A15 and A7 + * that hit the cache with the C bit clear in the SCTLR register." + */ + mpidr = read_cpuid_mpidr(); + cpunr = exynos_pmu_cpunr(mpidr); + + exynos_cpu_power_up(cpunr); +} + static const struct mcpm_platform_ops exynos_power_ops = { .power_up = exynos_power_up, .power_down = exynos_power_down, .power_down_finish = exynos_power_down_finish, + .suspend = exynos_suspend, + .powered_up = exynos_powered_up, }; static void __init exynos_mcpm_usage_count_init(void)