Message ID | 20210827013415.24027-1-digetx@gmail.com |
---|---|
Headers | show |
Series | NVIDIA Tegra power management patches for 5.16 | expand |
27.08.2021 04:34, Dmitry Osipenko пишет: > diff --git a/drivers/opp/core.c b/drivers/opp/core.c > index 04b4691a8aac..fae5267f5218 100644 > --- a/drivers/opp/core.c > +++ b/drivers/opp/core.c > @@ -939,7 +939,8 @@ static int _set_required_opps(struct device *dev, > return ret; > } > > -static void _find_current_opp(struct device *dev, struct opp_table *opp_table) > +static struct dev_pm_opp * > +_find_current_opp(struct device *dev, struct opp_table *opp_table) > { > struct dev_pm_opp *opp = ERR_PTR(-ENODEV); > unsigned long freq; > @@ -961,7 +962,7 @@ static void _find_current_opp(struct device *dev, struct opp_table *opp_table) > mutex_unlock(&opp_table->lock); > } > > - opp_table->current_opp = opp; > + return opp; > } > > static int _disable_opp_table(struct device *dev, struct opp_table *opp_table) > @@ -1003,7 +1004,7 @@ static int _set_opp(struct device *dev, struct opp_table *opp_table, > > /* Find the currently set OPP if we don't know already */ > if (unlikely(!opp_table->current_opp)) > - _find_current_opp(dev, opp_table); > + opp_table->current_opp = _find_current_opp(dev, opp_table); > > old_opp = opp_table->current_opp; > > @@ -2931,3 +2932,38 @@ int dev_pm_opp_sync_regulators(struct device *dev) > return ret; > } Please skip these lines. I missed to remove them during rebase and haven't noticed until now.
On 27-08-21, 04:34, Dmitry Osipenko wrote: > + clk_opp_table = dev_pm_opp_set_clkname(dev, NULL); > + if (IS_ERR(clk_opp_table)) { > + dev_err(dev, "failed to set OPP clk: %pe\n", clk_opp_table); > + ret = PTR_ERR(clk_opp_table); > + goto put_hw; > + } Why do you need to do it ? OPP core already does this automatically.
27.08.2021 06:00, Viresh Kumar пишет: > On 27-08-21, 04:34, Dmitry Osipenko wrote: >> +/** >> + * dev_pm_opp_from_clk_rate() - Get OPP from current clock rate >> + * @dev: device for which we do this operation >> + * >> + * Get OPP which corresponds to the current clock rate of a device. >> + * >> + * Return: pointer to 'struct dev_pm_opp' on success and errorno otherwise. >> + */ >> +struct dev_pm_opp *dev_pm_opp_from_clk_rate(struct device *dev) > > I will rather call it dev_pm_opp_get_current(), and do the magic to find the > current OPP here as well. No need to reinvent the wheel. > Okay, I'll change it.
27.08.2021 06:47, Dmitry Osipenko пишет: > 27.08.2021 06:28, Dmitry Osipenko пишет: >> 27.08.2021 06:05, Viresh Kumar пишет: >>> On 27-08-21, 04:34, Dmitry Osipenko wrote: >>>> + clk_opp_table = dev_pm_opp_set_clkname(dev, NULL); >>>> + if (IS_ERR(clk_opp_table)) { >>>> + dev_err(dev, "failed to set OPP clk: %pe\n", clk_opp_table); >>>> + ret = PTR_ERR(clk_opp_table); >>>> + goto put_hw; >>>> + } >>> >>> Why do you need to do it ? OPP core already does this automatically. >> >> Indeed, thanks. >> > > Actually, it doesn't work. > > The devm_tegra_core_dev_init_opp_table() needs to set clk to support older device-tree and now OPP table already has clk being set. > > WARNING: CPU: 2 PID: 92 at drivers/opp/core.c:2146 dev_pm_opp_set_clkname+0x97/0xb8 > Modules linked in: > CPU: 2 PID: 92 Comm: kworker/u8:1 Tainted: G W 5.14.0-rc7-next-20210826-00181-g6389463cbb0a #9318 > Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) > Workqueue: events_unbound deferred_probe_work_func > [<c010cc91>] (unwind_backtrace) from [<c0108d35>] (show_stack+0x11/0x14) > [<c0108d35>] (show_stack) from [<c0a6c1bd>] (dump_stack_lvl+0x2b/0x34) > [<c0a6c1bd>] (dump_stack_lvl) from [<c011fc47>] (__warn+0xbb/0x100) > [<c011fc47>] (__warn) from [<c0a696e3>] (warn_slowpath_fmt+0x4b/0x80) > [<c0a696e3>] (warn_slowpath_fmt) from [<c07407b3>] (dev_pm_opp_set_clkname+0x97/0xb8) > [<c07407b3>] (dev_pm_opp_set_clkname) from [<c07407e3>] (devm_pm_opp_set_clkname+0xf/0x64) > [<c07407e3>] (devm_pm_opp_set_clkname) from [<c050735b>] (devm_tegra_core_dev_init_opp_table+0x23/0x144) > [<c050735b>] (devm_tegra_core_dev_init_opp_table) from [<c05aad09>] (gr3d_probe+0x111/0x348) > [<c05aad09>] (gr3d_probe) from [<c05ba69b>] (platform_probe+0x43/0x84) > [<c05ba69b>] (platform_probe) from [<c05b8c01>] (really_probe.part.0+0x69/0x200) > [<c05b8c01>] (really_probe.part.0) from [<c05b8e0b>] (__driver_probe_device+0x73/0xd4) > [<c05b8e0b>] (__driver_probe_device) from [<c05b8ea1>] (driver_probe_device+0x35/0xd0) > [<c05b8ea1>] (driver_probe_device) from [<c05b92a9>] (__device_attach_driver+0x75/0x98) > [<c05b92a9>] (__device_attach_driver) from [<c05b769d>] (bus_for_each_drv+0x51/0x7c) > [<c05b769d>] (bus_for_each_drv) from [<c05b908f>] (__device_attach+0x8b/0x104) > [<c05b908f>] (__device_attach) from [<c05b81b3>] (bus_probe_device+0x5b/0x60) > [<c05b81b3>] (bus_probe_device) from [<c05b5d9f>] (device_add+0x293/0x65c) > [<c05b5d9f>] (device_add) from [<c0777a4f>] (of_platform_device_create_pdata+0x63/0x88) > [<c0777a4f>] (of_platform_device_create_pdata) from [<c0777b7d>] (of_platform_bus_create+0xfd/0x26c) > [<c0777b7d>] (of_platform_bus_create) from [<c0777dc5>] (of_platform_populate+0x45/0x84) > [<c0777dc5>] (of_platform_populate) from [<c0777e5d>] (devm_of_platform_populate+0x41/0x6c) > [<c0777e5d>] (devm_of_platform_populate) from [<c05490f9>] (host1x_probe+0x1e9/0x2c8) > [<c05490f9>] (host1x_probe) from [<c05ba69b>] (platform_probe+0x43/0x84) > [<c05ba69b>] (platform_probe) from [<c05b8c01>] (really_probe.part.0+0x69/0x200) > [<c05b8c01>] (really_probe.part.0) from [<c05b8e0b>] (__driver_probe_device+0x73/0xd4) > [<c05b8e0b>] (__driver_probe_device) from [<c05b8ea1>] (driver_probe_device+0x35/0xd0) > [<c05b8ea1>] (driver_probe_device) from [<c05b92a9>] (__device_attach_driver+0x75/0x98) > [<c05b92a9>] (__device_attach_driver) from [<c05b769d>] (bus_for_each_drv+0x51/0x7c) > [<c05b769d>] (bus_for_each_drv) from [<c05b908f>] (__device_attach+0x8b/0x104) > [<c05b908f>] (__device_attach) from [<c05b81b3>] (bus_probe_device+0x5b/0x60) > [<c05b81b3>] (bus_probe_device) from [<c05b8493>] (deferred_probe_work_func+0x57/0x78) > [<c05b8493>] (deferred_probe_work_func) from [<c0136f73>] (process_one_work+0x147/0x3f8) > [<c0136f73>] (process_one_work) from [<c0137759>] (worker_thread+0x21d/0x3f4) > [<c0137759>] (worker_thread) from [<c013c10f>] (kthread+0x123/0x140) > [<c013c10f>] (kthread) from [<c0100135>] (ret_from_fork+0x11/0x1c) > ---[ end trace f68728a0d3053b54 ]--- > tegra-gr3d 54180000.gr3d: tegra-soc: failed to set OPP clk: -16 > That's because devm_pm_opp_attach_genpd() holds the reference to OPP table on Tegra30 which uses multiple power domains. See gr3d_init_power() of the GR3D patch. It works in case of a single-domain hardware.
27.08.2021 07:02, Viresh Kumar пишет: > On 27-08-21, 06:47, Dmitry Osipenko wrote: >> Actually, it doesn't work. >> >> The devm_tegra_core_dev_init_opp_table() needs to set clk to support older device-tree and now OPP table already has clk being set. >> >> WARNING: CPU: 2 PID: 92 at drivers/opp/core.c:2146 dev_pm_opp_set_clkname+0x97/0xb8 >> Modules linked in: >> CPU: 2 PID: 92 Comm: kworker/u8:1 Tainted: G W 5.14.0-rc7-next-20210826-00181-g6389463cbb0a #9318 >> Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) >> Workqueue: events_unbound deferred_probe_work_func >> [<c010cc91>] (unwind_backtrace) from [<c0108d35>] (show_stack+0x11/0x14) >> [<c0108d35>] (show_stack) from [<c0a6c1bd>] (dump_stack_lvl+0x2b/0x34) >> [<c0a6c1bd>] (dump_stack_lvl) from [<c011fc47>] (__warn+0xbb/0x100) >> [<c011fc47>] (__warn) from [<c0a696e3>] (warn_slowpath_fmt+0x4b/0x80) >> [<c0a696e3>] (warn_slowpath_fmt) from [<c07407b3>] (dev_pm_opp_set_clkname+0x97/0xb8) >> [<c07407b3>] (dev_pm_opp_set_clkname) from [<c07407e3>] (devm_pm_opp_set_clkname+0xf/0x64) >> [<c07407e3>] (devm_pm_opp_set_clkname) from [<c050735b>] (devm_tegra_core_dev_init_opp_table+0x23/0x144) > > Why are you calling this anymore ? Older device-trees don't have OPPs, meanwhile drivers will use dev_pm_opp_set_rate() and it requires OPP table to be set up using devm_pm_opp_set_clkname(). The devm_tegra_core_dev_init_opp_table() is a common helper that sets up OPP table for Tegra drivers and it sets the clk.
27.08.2021 07:13, Viresh Kumar пишет: > On 27-08-21, 07:08, Dmitry Osipenko wrote: >> 27.08.2021 07:02, Viresh Kumar пишет: >>> On 27-08-21, 06:47, Dmitry Osipenko wrote: >>>> Actually, it doesn't work. >>>> >>>> The devm_tegra_core_dev_init_opp_table() needs to set clk to support older device-tree and now OPP table already has clk being set. >>>> >>>> WARNING: CPU: 2 PID: 92 at drivers/opp/core.c:2146 dev_pm_opp_set_clkname+0x97/0xb8 >>>> Modules linked in: >>>> CPU: 2 PID: 92 Comm: kworker/u8:1 Tainted: G W 5.14.0-rc7-next-20210826-00181-g6389463cbb0a #9318 >>>> Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) >>>> Workqueue: events_unbound deferred_probe_work_func >>>> [<c010cc91>] (unwind_backtrace) from [<c0108d35>] (show_stack+0x11/0x14) >>>> [<c0108d35>] (show_stack) from [<c0a6c1bd>] (dump_stack_lvl+0x2b/0x34) >>>> [<c0a6c1bd>] (dump_stack_lvl) from [<c011fc47>] (__warn+0xbb/0x100) >>>> [<c011fc47>] (__warn) from [<c0a696e3>] (warn_slowpath_fmt+0x4b/0x80) >>>> [<c0a696e3>] (warn_slowpath_fmt) from [<c07407b3>] (dev_pm_opp_set_clkname+0x97/0xb8) >>>> [<c07407b3>] (dev_pm_opp_set_clkname) from [<c07407e3>] (devm_pm_opp_set_clkname+0xf/0x64) >>>> [<c07407e3>] (devm_pm_opp_set_clkname) from [<c050735b>] (devm_tegra_core_dev_init_opp_table+0x23/0x144) >>> >>> Why are you calling this anymore ? >> >> Older device-trees don't have OPPs, meanwhile drivers will use >> dev_pm_opp_set_rate() and it requires OPP table to be set up using >> devm_pm_opp_set_clkname(). >> >> The devm_tegra_core_dev_init_opp_table() is a common helper that sets up >> OPP table for Tegra drivers and it sets the clk. > > Ahh, I see. that's okay then. Just add a comment over it to specify the same. > Doing devm_pm_opp_set_clkname(dev, NULL) is special and looks suspicious > otherwise. I'll add comment, thanks.