Message ID | 20210523231335.8238-1-digetx@gmail.com |
---|---|
Headers | show |
Series | NVIDIA Tegra memory and power management changes for 5.14 | expand |
24.05.2021 02:13, Dmitry Osipenko пишет: > Detach coupled regulator before dropping coupling count in order to allow > detaching callback to balance voltage of regulators. This is needed by > NVIDIA Tegra regulator couplers in order to bring back voltage to a value > that is safe for reboot once regulators are decoupled. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > drivers/regulator/core.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c > index aae978c0c148..83571f83af04 100644 > --- a/drivers/regulator/core.c > +++ b/drivers/regulator/core.c > @@ -5084,6 +5084,13 @@ static void regulator_remove_coupling(struct regulator_dev *rdev) > > n_coupled = c_desc->n_coupled; > > + if (coupler && coupler->detach_regulator) { > + err = coupler->detach_regulator(coupler, rdev); > + if (err) > + rdev_err(rdev, "failed to detach from coupler: %pe\n", > + ERR_PTR(err)); > + } > + > for (i = 1; i < n_coupled; i++) { > c_rdev = c_desc->coupled_rdevs[i]; > > @@ -5111,13 +5118,6 @@ static void regulator_remove_coupling(struct regulator_dev *rdev) > c_desc->n_resolved--; > } > > - if (coupler && coupler->detach_regulator) { > - err = coupler->detach_regulator(coupler, rdev); > - if (err) > - rdev_err(rdev, "failed to detach from coupler: %pe\n", > - ERR_PTR(err)); > - } > - > kfree(rdev->coupling_desc.coupled_rdevs); > rdev->coupling_desc.coupled_rdevs = NULL; > } > I now realized that this is a bit too fragile approach. I'll drop this patch in v3, there are better options of how to manage balancing on detaching and this is not critical feature for now anyways.
On Mon, 24 May 2021 at 01:13, Dmitry Osipenko <digetx@gmail.com> wrote: > > All NVIDIA Tegra SoCs have a core power domain where majority of hardware > blocks reside. Document the new core power domain properties. > > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Kind regards Uffe > --- > .../arm/tegra/nvidia,tegra20-pmc.yaml | 35 +++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml > index 43fd2f8927d0..0afec83cc723 100644 > --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml > @@ -301,6 +301,33 @@ patternProperties: > > additionalProperties: false > > + core-domain: > + type: object > + description: | > + The vast majority of hardware blocks of Tegra SoC belong to a > + Core power domain, which has a dedicated voltage rail that powers > + the blocks. > + > + properties: > + operating-points-v2: > + description: > + Should contain level, voltages and opp-supported-hw property. > + The supported-hw is a bitfield indicating SoC speedo or process > + ID mask. > + > + "#power-domain-cells": > + const: 0 > + > + required: > + - operating-points-v2 > + - "#power-domain-cells" > + > + additionalProperties: false > + > + core-supply: > + description: > + Phandle to voltage regulator connected to the SoC Core power rail. > + > required: > - compatible > - reg > @@ -325,6 +352,7 @@ examples: > tegra_pmc: pmc@7000e400 { > compatible = "nvidia,tegra210-pmc"; > reg = <0x7000e400 0x400>; > + core-supply = <®ulator>; > clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; > clock-names = "pclk", "clk32k_in"; > #clock-cells = <1>; > @@ -338,17 +366,24 @@ examples: > nvidia,core-power-req-active-high; > nvidia,sys-clock-req-active-high; > > + pd_core: core-domain { > + operating-points-v2 = <&core_opp_table>; > + #power-domain-cells = <0>; > + }; > + > powergates { > pd_audio: aud { > clocks = <&tegra_car TEGRA210_CLK_APE>, > <&tegra_car TEGRA210_CLK_APB2APE>; > resets = <&tegra_car 198>; > + power-domains = <&pd_core>; > #power-domain-cells = <0>; > }; > > pd_xusbss: xusba { > clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; > resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; > + power-domains = <&pd_core>; > #power-domain-cells = <0>; > }; > }; > -- > 2.30.2 >