From patchwork Tue May 4 06:58:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 431048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A8FCC433ED for ; Tue, 4 May 2021 06:58:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1172F613B4 for ; Tue, 4 May 2021 06:58:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229904AbhEDG7s (ORCPT ); Tue, 4 May 2021 02:59:48 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:45166 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229903AbhEDG7r (ORCPT ); Tue, 4 May 2021 02:59:47 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1620111533; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=SP4OX5V85Stf/3lWPp2l71R2s4ZE0w97l0D80tD7ZOk=; b=dk3EDp/YiI3n/qLbS4Z4OR3dFtnwiejXiUseg7C/xKo+CxNK+bsRlDOOtXlvTOhOl8AFyUEI z9nSOc0+FKRcGQVVkzSR9cxLplLmGO+fG8dNTFcRRFOqnduYJMewgg7WFf/I3+QwBpfl0ytV PNHrpBhqVb7X8+4AkgLoVndu4oc= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI5ZDFmMiIsICJsaW51eC1wbUB2Z2VyLmtlcm5lbC5vcmciLCAiYmU5ZTRhIl0= Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-east-1.postgun.com with SMTP id 6090f0ac2cbba88980bdcae6 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 04 May 2021 06:58:52 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 19C26C4323A; Tue, 4 May 2021 06:58:52 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id DAC77C4338A; Tue, 4 May 2021 06:58:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DAC77C4338A Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: bjorn.andersson@linaro.org, dianders@chromium.org, mka@chromium.org Cc: viresh.kumar@linaro.org, sboyd@kernel.org, agross@kernel.org, robh+dt@kernel.org, rjw@rjwysocki.net, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Sibi Sankar Subject: [PATCH v2 0/2] DDR/L3 Scaling support on SC7280 SoCs Date: Tue, 4 May 2021 12:28:28 +0530 Message-Id: <1620111510-31455-1-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The patch series adds support for DDR/L3 Scaling on SC7280 SoCs. V2: * Add a new opp table for cpu 7 to account for the additional frequencies supported by it. Depends on the following patch series: L3 Provider Support: https://lore.kernel.org/lkml/1618556290-28303-1-git-send-email-okukatla@codeaurora.org/ CPUfreq Support: https://lore.kernel.org/lkml/1618020280-5470-2-git-send-email-tdas@codeaurora.org/ RPMH Provider Support: https://lore.kernel.org/lkml/1619517059-12109-1-git-send-email-okukatla@codeaurora.org/ It also depends on L3 and cpufreq dt nodes from the ^^ series to not have overlapping memory regions. Sibi Sankar (2): cpufreq: blacklist SC7280 in cpufreq-dt-platdev arm64: dts: qcom: sc7280: Add cpu OPP tables arch/arm64/boot/dts/qcom/sc7280.dtsi | 215 +++++++++++++++++++++++++++++++++++ drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 2 files changed, 216 insertions(+)