From patchwork Mon May 12 21:40:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 29996 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f72.google.com (mail-oa0-f72.google.com [209.85.219.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A62F9238EB for ; Mon, 12 May 2014 21:41:09 +0000 (UTC) Received: by mail-oa0-f72.google.com with SMTP id l6sf42385052oag.7 for ; Mon, 12 May 2014 14:41:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:message-id:date:from:user-agent :mime-version:to:cc:subject:references:in-reply-to:sender:precedence :list-id:x-original-sender:x-original-authentication-results :mailing-list:list-post:list-help:list-archive:list-unsubscribe :content-type:content-transfer-encoding; bh=f5RbGgANnUHIQ+goRxLisXkUwq7dKs6dMq42XLlyWao=; b=DaZo+ubPJgUPf9djjdDWNhxC+61Zrdo3NstIAdjgnM1n0dR5lLktcBlgZ/hFTv0ahR ufHUvtAWQZHx92FAc6MQIXENy0Wz0AG5dI1LqUHo3liB9b1QB+mkPo17PFFBLVS3aeGU glkdIjNpCfKfJrvKhYClSkwd+JHmD50CFQruiXzEsKtVAi9jxX9AjDbYPFcyeBWimtXE S2GDym84vFowmkPpS1fhms+WqzMo+8uX/CMF9n8Pvvx7RFmNyxKgZEgBnsmXbYNsm8il 4C9NLU/H2J9A32iReKGN9fJq92LctyStJDPv6AntVW9G6oQpCHEnbrDzvPjaIint/Ag2 rIvg== X-Gm-Message-State: ALoCoQnaOjpbjWbDDv7sTnqb4njVbWykIS5u9tO5V6rvZhxHXaDkgI9xu9+cHEcEv9+XA/g508fW X-Received: by 10.43.139.201 with SMTP id ix9mr12671252icc.30.1399930869124; Mon, 12 May 2014 14:41:09 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.25.171 with SMTP id 40ls1057332qgt.85.gmail; Mon, 12 May 2014 14:41:09 -0700 (PDT) X-Received: by 10.52.53.69 with SMTP id z5mr2363968vdo.42.1399930869023; Mon, 12 May 2014 14:41:09 -0700 (PDT) Received: from mail-vc0-f169.google.com (mail-vc0-f169.google.com [209.85.220.169]) by mx.google.com with ESMTPS id an4si541495vdd.170.2014.05.12.14.41.08 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 12 May 2014 14:41:08 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.169 as permitted sender) client-ip=209.85.220.169; Received: by mail-vc0-f169.google.com with SMTP id ij19so9847565vcb.0 for ; Mon, 12 May 2014 14:41:08 -0700 (PDT) X-Received: by 10.58.216.34 with SMTP id on2mr24709823vec.22.1399930868906; Mon, 12 May 2014 14:41:08 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp101241vcb; Mon, 12 May 2014 14:41:06 -0700 (PDT) X-Received: by 10.66.155.102 with SMTP id vv6mr59645980pab.89.1399930866130; Mon, 12 May 2014 14:41:06 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id vv4si6923473pbc.494.2014.05.12.14.41.05; Mon, 12 May 2014 14:41:05 -0700 (PDT) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756117AbaELVlE (ORCPT + 6 others); Mon, 12 May 2014 17:41:04 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:45019 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755279AbaELVlD (ORCPT ); Mon, 12 May 2014 17:41:03 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s4CLeXk5032742; Mon, 12 May 2014 16:40:33 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4CLeXnr011823; Mon, 12 May 2014 16:40:33 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Mon, 12 May 2014 16:40:32 -0500 Received: from [158.218.103.31] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s4CLeVjG009465; Mon, 12 May 2014 16:40:32 -0500 Message-ID: <53713FCF.3000006@ti.com> Date: Mon, 12 May 2014 17:40:31 -0400 From: Santosh Shilimkar User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.3.0 MIME-Version: 1.0 To: Tony Lindgren , Kevin Hilman CC: Roger Quadros , "Menon, Nishanth" , Grygorii Strashko , Paul Walmsley , Taras Kondratiuk , "linux-omap@vger.kernel.org" , Linux ARM Kernel Mailing List , "Kristo, Tero" , Paul Burton , Daniel Lezcano , "Rafael J. Wysocki" Subject: Re: omap4-panda-es boot issues with v3.15-rc4 References: <536B7E44.2040303@ti.com> <7hppjos2w2.fsf@paris.lan> <20140508165558.GB2198@atomide.com> <20140508184055.GC2198@atomide.com> <7hha4zsyro.fsf@paris.lan> <536C9084.50209@ti.com> <7heh02ms82.fsf@paris.lan> <20140511155542.GD28266@atomide.com> In-Reply-To: <20140511155542.GD28266@atomide.com> Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: santosh.shilimkar@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On Sunday 11 May 2014 11:55 AM, Tony Lindgren wrote: > * Kevin Hilman [140509 16:46]: >> Roger Quadros writes: >> >>> Kevin, >>> >>> On 05/09/2014 01:15 AM, Kevin Hilman wrote: >>>> Tony Lindgren writes: >>>> >>>> [...] >>>> >>>>> ..but I think I found the cause for recent hangs on panda, just a wild >>>>> guess based on looking at the recent cpuidle patches after v3.14. >>>>> >>>>> Looks like reverting 0b89e9aa2856 (cpuidle: delay enabling interrupts >>>>> until all coupled CPUs leave idle) makes booting work reliably again >>>>> on panda. >>>>> >>>>> Can you guys confirm, so far no issues here after few boot tests, >>>>> but it might be too early to tell. >>>> >>>> Reverting that makes things a bit more stable, but it still eventually >>>> fails in the same way. For me it took 8 boots for it to eventually >>>> fail. >>>> >>>> However, if I build with CONFIG_CPU_IDLE=n, it becomes much more stable >>>> (20+ boots in a row and still going.) >>>> >>> >>> Can you please test with CPU_IDLE enabled but C3 disabled as in below patch? >>> It worked for me 10/10 boots. >> >> Yup, it worked for me too for 10/10 boots in a row. > > But what has caused this regression, does it work reliably with let's > say v3.13 or v3.12? > IIRC things were stable till some CPUIDLE code consolidation happened. I don't recall exactly but some one did discuss about it a while back. Can you re-run your test-cases with patch at end of the email. This is just a hunch so don't blame me if I waste your time testing the patch. regards, Santosh >From bdd30d68f8fa659aa0e3ce436f94029a7719036b Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 12 May 2014 17:37:59 -0400 Subject: [PATCH] Revert "cpuidle / omap4 : use CPUIDLE_FLAG_TIMER_STOP flag" This reverts commit cb7094e848f7bcaa0a4cda3db4b232f08dbf5b78. Conflicts: arch/arm/mach-omap2/cpuidle44xx.c --- arch/arm/mach-omap2/cpuidle44xx.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 01fc710..aae3606 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -83,6 +83,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, { struct idle_statedata *cx = state_ptr + index; u32 mpuss_can_lose_context = 0; + int cpu_id = smp_processor_id(); /* * CPU0 has to wait and stay ON until CPU1 is OFF state. @@ -110,6 +111,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) && (cx->mpu_logic_state == PWRDM_POWER_OFF); + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id); + /* * Call idle CPU PM enter notifier chain so that * VFP and per CPU interrupt context is saved. @@ -165,6 +168,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, if (dev->cpu == 0 && mpuss_can_lose_context) cpu_cluster_pm_exit(); + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id); + fail: cpuidle_coupled_parallel_barrier(dev, &abort_barrier); cpu_done[dev->cpu] = false; @@ -189,8 +194,7 @@ static struct cpuidle_driver omap4_idle_driver = { /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ .exit_latency = 328 + 440, .target_residency = 960, - .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | - CPUIDLE_FLAG_TIMER_STOP, + .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, .enter = omap_enter_idle_coupled, .name = "C2", .desc = "CPUx OFF, MPUSS CSWR", @@ -199,8 +203,7 @@ static struct cpuidle_driver omap4_idle_driver = { /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ .exit_latency = 460 + 518, .target_residency = 1100, - .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | - CPUIDLE_FLAG_TIMER_STOP, + .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, .enter = omap_enter_idle_coupled, .name = "C3", .desc = "CPUx OFF, MPUSS OSWR",