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[209.132.180.67]) by mx.google.com with ESMTP id pj5si14052847pbb.69.2014.06.17.03.37.44; Tue, 17 Jun 2014 03:37:44 -0700 (PDT) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753102AbaFQKhn (ORCPT + 6 others); Tue, 17 Jun 2014 06:37:43 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:45500 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751994AbaFQKhn (ORCPT ); Tue, 17 Jun 2014 06:37:43 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s5HAbB53024789; Tue, 17 Jun 2014 05:37:11 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5HAbBO2000770; Tue, 17 Jun 2014 05:37:11 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 17 Jun 2014 05:37:11 -0500 Received: from psplinux063.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5HAb8DV003863; Tue, 17 Jun 2014 05:37:09 -0500 From: Sekhar Nori To: Tony Lindgren CC: Russell King , Linux OMAP Mailing List , Linux ARM Mailing List , Nishanth Menon , Sekhar Nori Subject: [PATCH] ARM: OMAP2+: l2c: squelch warning dump on power control setting Date: Tue, 17 Jun 2014 16:04:51 +0530 Message-ID: <3c3a7a4861df01d0163787a9c18f7b7ac821c5b9.1403000372.git.nsekhar@ti.com> X-Mailer: git-send-email 1.7.10.1 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: nsekhar@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.177 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ROM code on AM437x does not support writing to L2C-310 power control register. The L2C driver, however, tries writing to this register for all revisions >= r3p0. This leads to a warning dump on boot which leads most users to believe that L2 cache is non-functional. Since the problem is understood, and cannot be addressed through software, replace the warning with a pr_info() while maintaining the WARN_ON() for other truly unexpected scenarios. Reported-by: Nishanth Menon Signed-off-by: Sekhar Nori Tested-by: Felipe Balbi Acked-by: Santosh Shilimkar --- arch/arm/mach-omap2/omap4-common.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 326cd98..9139729 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -188,6 +188,10 @@ static void omap4_l2c310_write_sec(unsigned long val, unsigned reg) smc_op = OMAP4_MON_L2X0_PREFETCH_INDEX; break; + case L310_POWER_CTRL: + pr_info_once("OMAP L2C310: ROM does not support power control setting\n"); + return; + default: WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg); return;