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[93.181.165.181]) by smtp.gmail.com with ESMTPSA id s5-20020ac24645000000b00448628b8462sm598481lfo.249.2022.03.10.15.33.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Mar 2022 15:33:29 -0800 (PST) From: Janusz Krzysztofik To: Tony Lindgren Cc: Paul Walmsley , Aaro Koskinen , Alan Stern , Greg Kroah-Hartman , Helge Deller , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, Janusz Krzysztofik Subject: [RFC PATCH 2/4] ARM: OMAP1: clock: Remove noop code Date: Fri, 11 Mar 2022 00:33:05 +0100 Message-Id: <20220310233307.99220-3-jmkrzyszt@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220310233307.99220-1-jmkrzyszt@gmail.com> References: <20220310233307.99220-1-jmkrzyszt@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org There are some OMAP1 clock code bits that have no effect: - crystal_type variable is set to 0 but never changed, then crystal_type == 2 condition is never true and ck_ref.rate never set to 19200000, - clk->ops->allow_idle() is called from omap_clk_enable_autoidle_all() but that op is not configured for any clock, then the function does nothing and the op field is not needed, - ENABLE_ON_INIT flag is set for some clocks but is never checked by any code, then not needed. Drop that code. Signed-off-by: Janusz Krzysztofik --- arch/arm/mach-omap1/clock.c | 17 ----------------- arch/arm/mach-omap1/clock.h | 3 --- arch/arm/mach-omap1/clock_data.c | 8 +------- 3 files changed, 1 insertion(+), 27 deletions(-) diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 5622ad487c8b..da74c09a71de 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -798,22 +798,6 @@ void clk_unregister(struct clk *clk) } EXPORT_SYMBOL(clk_unregister); -int omap_clk_enable_autoidle_all(void) -{ - struct clk *c; - unsigned long flags; - - spin_lock_irqsave(&clockfw_lock, flags); - - list_for_each_entry(c, &clocks, node) - if (c->ops->allow_idle) - c->ops->allow_idle(c); - - spin_unlock_irqrestore(&clockfw_lock, flags); - - return 0; -} - /* * Low level helpers */ @@ -871,7 +855,6 @@ static int __init clk_disable_unused(void) return 0; } late_initcall(clk_disable_unused); -late_initcall(omap_clk_enable_autoidle_all); #endif #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 7bebd488f1be..8025e4a22469 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -53,7 +53,6 @@ struct omap_clk { struct clkops { int (*enable)(struct clk *); void (*disable)(struct clk *); - void (*allow_idle)(struct clk *); }; /* @@ -64,7 +63,6 @@ struct clkops { #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ #define CLOCK_IDLE_CONTROL (1 << 1) #define CLOCK_NO_IDLE_PARENT (1 << 2) -#define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ /** * struct clk - OMAP struct clk @@ -135,7 +133,6 @@ extern void clk_unregister(struct clk *clk); extern void propagate_rate(struct clk *clk); extern unsigned long followparent_recalc(struct clk *clk); unsigned long omap_fixed_divisor_recalc(struct clk *clk); -extern int omap_clk_enable_autoidle_all(void); extern const struct clkops clkops_null; diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 3ebcd96efbff..d55e4af7932e 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -93,8 +93,7 @@ static struct arm_idlect1_clk ck_dpll1out = { .name = "ck_dpll1out", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT | - ENABLE_ON_INIT, + .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_CKOUT_ARM, .recalc = &followparent_recalc, @@ -147,7 +146,6 @@ static struct clk arm_gpio_ck = { .name = "ick", .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), .enable_bit = EN_GPIOCK, .recalc = &followparent_recalc, @@ -317,7 +315,6 @@ static struct clk tc2_ck = { .name = "tc2_ck", .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = ENABLE_ON_INIT, .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), .enable_bit = EN_TC2_CK, .recalc = &followparent_recalc, @@ -763,7 +760,6 @@ u32 cpu_mask; int __init omap1_clk_init(void) { struct omap_clk *c; - int crystal_type = 0; /* Default 12 MHz */ u32 reg; #ifdef CONFIG_DEBUG_LL @@ -811,8 +807,6 @@ int __init omap1_clk_init(void) if (cpu_is_omap7xx()) ck_ref.rate = 13000000; - if (cpu_is_omap16xx() && crystal_type == 2) - ck_ref.rate = 19200000; pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),