From patchwork Fri Aug 21 03:54:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 248075 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:522:0:0:0:0 with SMTP id h2csp85ils; Thu, 20 Aug 2020 20:56:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzHeE9MYVR2/OcRvmbh7mrjrgfw5wBWWAwhbjcxB4yubn6UU57Y018vuxCbCE0URCIAgRrM X-Received: by 2002:a05:6402:b67:: with SMTP id cb7mr1007008edb.216.1597982198087; Thu, 20 Aug 2020 20:56:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1597982198; cv=none; d=google.com; s=arc-20160816; b=nmDthnTVisv3a39ISQAWAUOBZqld5TIAvNQwe51oFPzyJpvP907jh2db5+ewurYtKs LQB3GRNGZDuj8y+azMuK9wx22DCa5izKqz//hrd84sBffhJ958j49KkpG3p+YhugAzBX 808en89Ottpjao/v+W2ffCJryn891y6/tJeELjvGVDSoAETreSiOZkyg1XhttjOqthzz 5im7h5fnwDRszavB1Jlcj3ccorylMrlIw7VIuYBbrXdFfHBTximOTXDtnANkCIoqCwwb aQcQMPllqdfYlYCpVpjI7a4RJoS72a0ybHMiZo6VGCfr7zWTHG9trnPnMdjfoQGqm5p5 /JUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=AfxIdt959NXaODT/XtFkfeDPzE0A42F3V0bVD6SSbnw=; b=NDur2UOps/lqiMjYj2Uia3gTp98EwGNTw7xGoT+7FhTjxISLxjZzU4ohDJ651/O3+S 57omyidl8iZVBEAf84kQuZXpycSXTBGThIsHTgGK1215dvlUMxHY/tlDpiuxBOp1I7wE C5CzaE3CZ9NHsYAeGanzlfmaZ8x7BCCZAYYkIYWiwYu9sOBUQbPI+JYISYMQWQbWa5vu 7sKNgUktYTU/BvMXNI7/X5AwnHgQqbfJrRiFBRuoSxOEW0/MgNxvsBjB6U2gf/KfKG0g VM0STv6TJycVQE41LtpbtqbU3R7wo11eqRrBKL/ZP0PzrWHP33eI1oCpNot9haIwuYRv no7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id lv25si383713ejb.396.2020.08.20.20.56.37; Thu, 20 Aug 2020 20:56:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728047AbgHUD4g (ORCPT + 4 others); Thu, 20 Aug 2020 23:56:36 -0400 Received: from mail-il1-f194.google.com ([209.85.166.194]:44971 "EHLO mail-il1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727082AbgHUD4f (ORCPT ); Thu, 20 Aug 2020 23:56:35 -0400 Received: by mail-il1-f194.google.com with SMTP id j9so321479ilc.11; Thu, 20 Aug 2020 20:56:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AfxIdt959NXaODT/XtFkfeDPzE0A42F3V0bVD6SSbnw=; b=YrmrDkgN653KaL3Wk5MUMYzKkdOJ/Vb/BbehmwWv5x4r7mW0JWGQcsvUKgzGEh0TeF ow8wFOsv3178gZ4Kypd5DB96BKLJdKQmcyKDYaIURKS3r+A/QHbqglFj18U8kPSRYZ7n DTOmQR3X4fRuSWABLm36aXJe9Y0VAoug5WwaYLG7rNUi7Ve7Oo7hAGUq40ZRCnRveHjZ Ddk9Hhgw6n3NpNTrROD49lH1penUkYPY2YWrBKBzErwsh5A7JDIESlbKhZ7eYInPNi+L tM8R15ZtqiScU5GVFHxurLhHI1Gu8/l4WRjiMCpstZCumWhg2VWQ2jwE+ApZN43OsqOP Byhg== X-Gm-Message-State: AOAM5327T/EOXiVupWDxS9/8/53cyxkiXQxy2+2rFB65uURdAluuptZC hTlMHiMgXJ2ydrH8WNTrwg== X-Received: by 2002:a05:6e02:14c2:: with SMTP id o2mr1030464ilk.54.1597982193525; Thu, 20 Aug 2020 20:56:33 -0700 (PDT) Received: from xps15.herring.priv ([64.188.179.249]) by smtp.googlemail.com with ESMTPSA id 79sm413923ilc.9.2020.08.20.20.56.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Aug 2020 20:56:32 -0700 (PDT) From: Rob Herring To: Bjorn Helgaas , Lorenzo Pieralisi Cc: linux-pci@vger.kernel.org, Andy Gross , Binghui Wang , Bjorn Andersson , Dilip Kota , Fabio Estevam , Gustavo Pimentel , Jerome Brunet , Jesper Nilsson , Jingoo Han , Jonathan Chocron , Jonathan Hunter , Kevin Hilman , Kishon Vijay Abraham I , Krzysztof Kozlowski , Kukjin Kim , Kunihiko Hayashi , Lucas Stach , Martin Blumenstingl , Masahiro Yamada , Murali Karicheri , Neil Armstrong , NXP Linux Team , Pengutronix Kernel Team , Pratyush Anand , Richard Zhu , Sascha Hauer , Shawn Guo , Shawn Guo , Stanimir Varbanov , Thierry Reding , Xiaowei Song , Yue Wang , Marc Zyngier , linux-amlogic@lists.infradead.org, linux-arm-kernel@axis.com, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-omap@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 32/40] PCI: dwc: Remove read_dbi2 code Date: Thu, 20 Aug 2020 21:54:12 -0600 Message-Id: <20200821035420.380495-33-robh@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821035420.380495-1-robh@kernel.org> References: <20200821035420.380495-1-robh@kernel.org> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The DBI2 appears to be write-only and there's no read accesses in the code anyways, so let's remove all the read_dbi2 related code. Cc: Murali Karicheri Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Jingoo Han Cc: Gustavo Pimentel Signed-off-by: Rob Herring --- drivers/pci/controller/dwc/pci-keystone.c | 13 ------------- drivers/pci/controller/dwc/pcie-designware.c | 15 --------------- drivers/pci/controller/dwc/pcie-designware.h | 8 -------- 3 files changed, 36 deletions(-) -- 2.25.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 39a5a72de340..5fe36da0b7c6 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -881,18 +881,6 @@ static int __init ks_pcie_add_pcie_port(struct keystone_pcie *ks_pcie, return 0; } -static u32 ks_pcie_am654_read_dbi2(struct dw_pcie *pci, void __iomem *base, - u32 reg, size_t size) -{ - struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); - u32 val; - - ks_pcie_set_dbi_mode(ks_pcie); - dw_pcie_read(base + reg, size, &val); - ks_pcie_clear_dbi_mode(ks_pcie); - return val; -} - static void ks_pcie_am654_write_dbi2(struct dw_pcie *pci, void __iomem *base, u32 reg, size_t size, u32 val) { @@ -907,7 +895,6 @@ static const struct dw_pcie_ops ks_pcie_dw_pcie_ops = { .start_link = ks_pcie_start_link, .stop_link = ks_pcie_stop_link, .link_up = ks_pcie_link_up, - .read_dbi2 = ks_pcie_am654_read_dbi2, .write_dbi2 = ks_pcie_am654_write_dbi2, }; diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index ed5dadcbcb45..b2739b96659f 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -166,21 +166,6 @@ void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val) } EXPORT_SYMBOL_GPL(dw_pcie_write_dbi); -u32 dw_pcie_read_dbi2(struct dw_pcie *pci, u32 reg, size_t size) -{ - int ret; - u32 val; - - if (pci->ops->read_dbi2) - return pci->ops->read_dbi2(pci, pci->dbi_base2, reg, size); - - ret = dw_pcie_read(pci->dbi_base2 + reg, size, &val); - if (ret) - dev_err(pci->dev, "read DBI address failed\n"); - - return val; -} - void dw_pcie_write_dbi2(struct dw_pcie *pci, u32 reg, size_t size, u32 val) { int ret; diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 73c119437fee..c3178c8694eb 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -232,8 +232,6 @@ struct dw_pcie_ops { size_t size); void (*write_dbi)(struct dw_pcie *pcie, void __iomem *base, u32 reg, size_t size, u32 val); - u32 (*read_dbi2)(struct dw_pcie *pcie, void __iomem *base, u32 reg, - size_t size); void (*write_dbi2)(struct dw_pcie *pcie, void __iomem *base, u32 reg, size_t size, u32 val); int (*link_up)(struct dw_pcie *pcie); @@ -269,7 +267,6 @@ int dw_pcie_write(void __iomem *addr, int size, u32 val); u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size); void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val); -u32 dw_pcie_read_dbi2(struct dw_pcie *pci, u32 reg, size_t size); void dw_pcie_write_dbi2(struct dw_pcie *pci, u32 reg, size_t size, u32 val); u32 dw_pcie_read_atu(struct dw_pcie *pci, u32 reg, size_t size); void dw_pcie_write_atu(struct dw_pcie *pci, u32 reg, size_t size, u32 val); @@ -322,11 +319,6 @@ static inline void dw_pcie_writel_dbi2(struct dw_pcie *pci, u32 reg, u32 val) dw_pcie_write_dbi2(pci, reg, 0x4, val); } -static inline u32 dw_pcie_readl_dbi2(struct dw_pcie *pci, u32 reg) -{ - return dw_pcie_read_dbi2(pci, reg, 0x4); -} - static inline void dw_pcie_writel_atu(struct dw_pcie *pci, u32 reg, u32 val) { dw_pcie_write_atu(pci, reg, 0x4, val);