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[23.128.96.18]) by mx.google.com with ESMTP id z3si380194ejx.477.2020.08.20.20.55.20; Thu, 20 Aug 2020 20:55:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727950AbgHUDzT (ORCPT + 4 others); Thu, 20 Aug 2020 23:55:19 -0400 Received: from mail-io1-f67.google.com ([209.85.166.67]:34897 "EHLO mail-io1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727909AbgHUDzS (ORCPT ); Thu, 20 Aug 2020 23:55:18 -0400 Received: by mail-io1-f67.google.com with SMTP id s2so491255ioo.2; Thu, 20 Aug 2020 20:55:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7oe9LLB2O2qB8amIUwgNF8kLMAkuXQasFfOXSkrgGMU=; b=Tz3OSwL3MutyOeaDS5jjqhxsItjjK7VjPfqvjYiMEBrHFUfsH65aQb1GbF0nW3uGx/ QEVQxoYLPKqxOM6Y4SUuAtrNU76JbBo211MiIXzTSeDL9dFyIruRJoub+EUn+/qwR7jr W7+mcyv+0NysWotQhvGCuV2zgI116IPio38PgzAo9TzkD/eDWXgPDl60lg+BGpCwDf9U QpTCFiZBwYUzSmAOMMb3Zf4dMo/W5rv1KRLTBsgo6y+g6irpxcoSH0xSkdHMbPnDsU/I JEybpAFu/fF5OXlGoWhj6cu3pZRrf4JivDj/vz5LxRy9N0Y0b2ML6j27Name98cmwn35 4R4A== X-Gm-Message-State: AOAM5304nu5A+i2zg2h+Hje+DWBdjJHp9vBgcp+9phVE0zEFKdiKyU/f +bUf7taWlcpJFQzp7h46uA== X-Received: by 2002:a02:454:: with SMTP id 81mr965925jab.142.1597982116863; Thu, 20 Aug 2020 20:55:16 -0700 (PDT) Received: from xps15.herring.priv ([64.188.179.249]) by smtp.googlemail.com with ESMTPSA id 79sm413923ilc.9.2020.08.20.20.55.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Aug 2020 20:55:16 -0700 (PDT) From: Rob Herring To: Bjorn Helgaas , Lorenzo Pieralisi Cc: linux-pci@vger.kernel.org, Andy Gross , Binghui Wang , Bjorn Andersson , Dilip Kota , Fabio Estevam , Gustavo Pimentel , Jerome Brunet , Jesper Nilsson , Jingoo Han , Jonathan Chocron , Jonathan Hunter , Kevin Hilman , Kishon Vijay Abraham I , Krzysztof Kozlowski , Kukjin Kim , Kunihiko Hayashi , Lucas Stach , Martin Blumenstingl , Masahiro Yamada , Murali Karicheri , Neil Armstrong , NXP Linux Team , Pengutronix Kernel Team , Pratyush Anand , Richard Zhu , Sascha Hauer , Shawn Guo , Shawn Guo , Stanimir Varbanov , Thierry Reding , Xiaowei Song , Yue Wang , Marc Zyngier , linux-amlogic@lists.infradead.org, linux-arm-kernel@axis.com, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-omap@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 12/40] PCI: dwc: Remove dwc specific config accessor ops Date: Thu, 20 Aug 2020 21:53:52 -0600 Message-Id: <20200821035420.380495-13-robh@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821035420.380495-1-robh@kernel.org> References: <20200821035420.380495-1-robh@kernel.org> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Now that all the drivers needing custom config accessors have been converted to define their own pci_ops, we can remove the DWC specific function callbacks {rd,wr}_{own,other}_conf. Cc: Jingoo Han Cc: Gustavo Pimentel Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Signed-off-by: Rob Herring --- drivers/pci/controller/dwc/pcie-designware-host.c | 14 -------------- drivers/pci/controller/dwc/pcie-designware.h | 6 ------ 2 files changed, 20 deletions(-) -- 2.25.1 diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index e87edce9b8da..33e632a24466 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -26,9 +26,6 @@ static int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, { struct dw_pcie *pci; - if (pp->ops->rd_own_conf) - return pp->ops->rd_own_conf(pp, where, size, val); - pci = to_dw_pcie_from_pp(pp); return dw_pcie_read(pci->dbi_base + where, size, val); } @@ -38,9 +35,6 @@ static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, { struct dw_pcie *pci; - if (pp->ops->wr_own_conf) - return pp->ops->wr_own_conf(pp, where, size, val); - pci = to_dw_pcie_from_pp(pp); return dw_pcie_write(pci->dbi_base + where, size, val); } @@ -537,10 +531,6 @@ static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus, static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { - if (pp->ops->rd_other_conf) - return pp->ops->rd_other_conf(pp, bus, devfn, where, - size, val); - return dw_pcie_access_other_conf(pp, bus, devfn, where, size, val, false); } @@ -548,10 +538,6 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { - if (pp->ops->wr_other_conf) - return pp->ops->wr_other_conf(pp, bus, devfn, where, - size, val); - return dw_pcie_access_other_conf(pp, bus, devfn, where, size, &val, true); } diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index a9d805b28c2a..4ed59b051b2b 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -160,12 +160,6 @@ enum dw_pcie_device_mode { }; struct dw_pcie_host_ops { - int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val); - int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val); - int (*rd_other_conf)(struct pcie_port *pp, struct pci_bus *bus, - unsigned int devfn, int where, int size, u32 *val); - int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus, - unsigned int devfn, int where, int size, u32 val); int (*host_init)(struct pcie_port *pp); void (*scan_bus)(struct pcie_port *pp); void (*set_num_vectors)(struct pcie_port *pp);