From patchwork Mon Jun 18 13:22:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 138944 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp3949670lji; Mon, 18 Jun 2018 06:23:21 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLduD+MrmGWZ/37Qt6QXwGVAhWWTQt0oFb50UDy0GyOI+oLt1UHuCCzo68i9j02dA+z6B8i X-Received: by 2002:a63:715d:: with SMTP id b29-v6mr11217985pgn.325.1529328201820; Mon, 18 Jun 2018 06:23:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529328201; cv=none; d=google.com; s=arc-20160816; b=fTUsW1GnLpsB/QSE3Vc5yRGkakfCPjDsAGpFw+jRyOur1EHtRbMaBAOXSgb+Kd1bwr M0c+gcq8vPZ5Ruz4nEC/tplWSyZUqLPJRX0YCWZh3OPYGHCjE1g94F8CIy+PTlZlIu01 xPyix9YJvjGRtjbI1ukmv8br0v/lUOCpwR+AiKcmb7vlvfi2M22APKxEG8yq4ZUxbWgl UOHEJ5+6NOrvFQMQeg2DUSmxB627oehtXWbe03xu6bnPDdEdN7+On7of4c8LLlPxdOpX +NtOrtJPmdw/55rG0w5NoQRi72kiaU6WgVomUzxRcjusCjbxvkYp52Efc8B6MIpNkaUA UxzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=bhC2sns5Rq989PFI5KTlJFYu7vMXPh9YzugK8dnmIxE=; b=LpMJ9CDnT2uW3wjv1mxzDhjy8/AMNao0gSbmE9XjMj7z9p/qlO5G8ZJ00cuvlR9O6+ YbZGENiaGM9dLvmziiVKZLNRPaYl9aF+ZnSHW+Dobg4luJcWMLg+XZpSEJVhjn5mANY1 agrbKKtPH1HQgLAW3lvJZd33BuSrwxbPqqWN6bsg3BLuLnZnPGOpHtUoRGZ38cxsASbG iH9JQ6k2neBJMt1C8ChCNpUwhHCvXMeR/bwqa3cdZt5vyOJuIr1UExIBejnucM2cc+xf jU9Y2L3NnWT5gjkBri+srOFLQWkLnbmAYp28a3V4LIj/6WiRfEdaFadU1A58wBmODRaF wIHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=TirJILFU; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ay6-v6si14871742plb.210.2018.06.18.06.23.21; Mon, 18 Jun 2018 06:23:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=TirJILFU; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933517AbeFRNXS (ORCPT + 5 others); Mon, 18 Jun 2018 09:23:18 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:30660 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934324AbeFRNXO (ORCPT ); Mon, 18 Jun 2018 09:23:14 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w5IDNBH9007164; Mon, 18 Jun 2018 08:23:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1529328191; bh=EcmSsxFFUD8Fv6VjBHRKTBtQf4zH7J7nQKOYOGRGbMM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TirJILFUzjWfrFavCLhqP9FliCRIXaVyJey/coHHcFeK6a8+iXSCuo7Ii5aTjHl6e DE+ZWPcuPUmJw2rNUlWVZjTqUuOe/fDSMy/YfSSqnDIG5v9csNfPrZd6bc8cwf+/vV vorEafS6eJWae2s62XHZ1yIDfjk7rF/ezSAIKAZw= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5IDNBPT018126; Mon, 18 Jun 2018 08:23:11 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Mon, 18 Jun 2018 08:23:11 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Mon, 18 Jun 2018 08:23:11 -0500 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w5IDMoww002369; Mon, 18 Jun 2018 08:23:09 -0500 From: Tomi Valkeinen To: , Laurent Pinchart , CC: Jyri Sarha , Peter Ujfalusi , Benoit Parrot , Tomi Valkeinen , Subject: [RFC PATCHv2 9/9] ARM: dts: keystone-k2g-evm: add LCD and HDMI displays Date: Mon, 18 Jun 2018 16:22:42 +0300 Message-ID: <20180618132242.8673-10-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180618132242.8673-1-tomi.valkeinen@ti.com> References: <20180618132242.8673-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org K2G EVM has an SiI902x HDMI encoder on the board, and a separately purchasable LCD which can be attached to the board. Only one of these displays can be used at a time, and two dip-switches need to be changed when switching to another display. The HDMI support is added to the base k2g-evm.dts file, and the LCD support is added as a separate k2g-evm-lcd.dts file. The user must choose one of the dtbs, depending on which display he wants to use. Signed-off-by: Tomi Valkeinen Cc: devicetree@vger.kernel.org --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/keystone-k2g-evm-lcd.dts | 80 ++++++++++++++++++++ arch/arm/boot/dts/keystone-k2g-evm.dts | 87 ++++++++++++++++++++++ 3 files changed, 168 insertions(+) create mode 100644 arch/arm/boot/dts/keystone-k2g-evm-lcd.dts -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e2424957809..11bb3ba22bdf 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -222,6 +222,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \ keystone-k2l-evm.dtb \ keystone-k2e-evm.dtb \ keystone-k2g-evm.dtb \ + keystone-k2g-evm-lcd.dtb \ keystone-k2g-ice.dtb dtb-$(CONFIG_MACH_KIRKWOOD) += \ kirkwood-b3.dtb \ diff --git a/arch/arm/boot/dts/keystone-k2g-evm-lcd.dts b/arch/arm/boot/dts/keystone-k2g-evm-lcd.dts new file mode 100644 index 000000000000..be0498010e71 --- /dev/null +++ b/arch/arm/boot/dts/keystone-k2g-evm-lcd.dts @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for K2G EVM with LCD Display + * + * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + */ + +#include "keystone-k2g-evm.dts" +#include + +/ { + lcd0: display { + compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; + label = "lcd"; + + backlight = <&lcd_bl>; + + panel-timing { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hfront-porch = <2>; + hback-porch = <2>; + hsync-len = <41>; + vfront-porch = <2>; + vback-porch = <2>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + + port { + lcd_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + }; + + lcd_bl: backlight { + compatible = "pwm-backlight"; + pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 32 64 96 128 160 192 224 255>; + default-brightness-level = <8>; + }; +}; + +&i2c1 { + edt-ft5306@38 { + status = "okay"; + compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; + reg = <0x38>; + + pinctrl-names = "default"; + pinctrl-0 = <&edt_ft5306_ts_pins>; + + interrupt-parent = <&gpio1>; + interrupts = <42 IRQ_TYPE_EDGE_FALLING>; + + touchscreen-size-x = <480>; + touchscreen-size-y = <272>; + }; +}; + +&k2g_pinctrl { + edt_ft5306_ts_pins: edt_ft5306_ts_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1364) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE3) /* pr1_pru1_gpo16.gpio1_42 */ + >; + }; +}; + +&dpi_out { + remote-endpoint = <&lcd_in>; +}; + +&sii9022 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts b/arch/arm/boot/dts/keystone-k2g-evm.dts index 6a4657799b99..b232e3b30d76 100644 --- a/arch/arm/boot/dts/keystone-k2g-evm.dts +++ b/arch/arm/boot/dts/keystone-k2g-evm.dts @@ -81,6 +81,13 @@ >; }; + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */ + K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */ + >; + }; + ecap0_pins: ecap0_pins { pinctrl-single,pins = < K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */ @@ -114,6 +121,46 @@ K2G_CORE_IOPAD(0x11f0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart2_txd.uart2_txd */ >; }; + + vout_pins: pinmux_vout_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1078) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata23.dssdata23 */ + K2G_CORE_IOPAD(0x107c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata22.dssdata22 */ + K2G_CORE_IOPAD(0x1080) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata21.dssdata21 */ + K2G_CORE_IOPAD(0x1084) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata20.dssdata20 */ + K2G_CORE_IOPAD(0x1088) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata19.dssdata19 */ + K2G_CORE_IOPAD(0x108c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata18.dssdata18 */ + K2G_CORE_IOPAD(0x1090) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata17.dssdata17 */ + K2G_CORE_IOPAD(0x1094) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata16.dssdata16 */ + K2G_CORE_IOPAD(0x1098) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata15.dssdata15 */ + K2G_CORE_IOPAD(0x109c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata14.dssdata14 */ + K2G_CORE_IOPAD(0x10a0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata13.dssdata13 */ + K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata12.dssdata12 */ + K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata11.dssdata11 */ + K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata10.dssdata10 */ + K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata9.dssdata9 */ + K2G_CORE_IOPAD(0x10b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata8.dssdata8 */ + K2G_CORE_IOPAD(0x10b8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata7.dssdata7 */ + K2G_CORE_IOPAD(0x10bc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata6.dssdata6 */ + K2G_CORE_IOPAD(0x10c0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata5.dssdata5 */ + K2G_CORE_IOPAD(0x10c4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata4.dssdata4 */ + K2G_CORE_IOPAD(0x10c8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata3.dssdata3 */ + K2G_CORE_IOPAD(0x10cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata2.dssdata2 */ + K2G_CORE_IOPAD(0x10d0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata1.dssdata1 */ + K2G_CORE_IOPAD(0x10d4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata0.dssdata0 */ + K2G_CORE_IOPAD(0x10d8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssvsync.dssvsync */ + K2G_CORE_IOPAD(0x10dc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsshsync.dsshsync */ + K2G_CORE_IOPAD(0x10e0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsspclk.dsspclk */ + K2G_CORE_IOPAD(0x10e4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssde.dssde */ + K2G_CORE_IOPAD(0x10e8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssfid.dssfid */ + >; + }; + + sii9022_pins: sii9022_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1338) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE3) /* pr1_pru1_gpo5.gpio1_31 */ + >; + }; }; &uart0 { @@ -268,3 +315,43 @@ pinctrl-0 = <&uart2_pins>; status = "okay"; }; + +&dss { + pinctrl-names = "default"; + pinctrl-0 = <&vout_pins>; + status = "ok"; + + port { + dpi_out: endpoint { + remote-endpoint = <&sii9022_in>; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; + clock-frequency = <400000>; + + sii9022: sii9022@3b { + compatible = "sil,sii9022"; + reg = <0x3b>; + + pinctrl-names = "default"; + pinctrl-0 = <&sii9022_pins>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + sii9022_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + }; + }; +};