From patchwork Fri Apr 27 11:47:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 134588 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp617551lji; Fri, 27 Apr 2018 04:47:58 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrmY8mH3LxeBW1O+QK6cA+ArQUGAkWOhkXmB6aQsLX4h4XnTVHeKsRDtR8yR5K9HzRiT2HF X-Received: by 2002:a17:902:6887:: with SMTP id i7-v6mr2003426plk.269.1524829678757; Fri, 27 Apr 2018 04:47:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524829678; cv=none; d=google.com; s=arc-20160816; b=kYxMunciP+070CmWyw6Hr9XdRRckh60SFXu2hUPnSyoKL9pPFVb1Zg1rv07770nd5i xfKQf6Q8Gvp8lGTTNE4ohBF4E2ZF5GsiQALMSFS7yikrFMl0Y89ISKCYvNh+7u/uD0k6 hg1KVv2jOECJHF5BzbMp50742/JU6p/7HsrzslztsdFSLQZthcYi9w87sfNjS2ZmdkV6 5rgKMHfr4UZ2hf/761OiaeWUmGZIo+++iqHC5RitUehqL4kG0oruXn9TuWeJW7vezk+F XvHeraJrrJmMK60CzyWKdJqAEd9LkTb13uk7TyaO1pDSyrkkQTVbFeA4QcdGaPLXihwV FxQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=34L59onuEoe6mO19DttXMAtw6QzQY2nslNXE6AgVK+Y=; b=wkBn+/gLHRYOBhzgNb7sQpeelE3ExGjy4JwcinTJ3LBz0zw2S1pZp4HjxnQBLqsSvl GVb1EcP/bgVFWLbV/u48MRZsA+a04MFAO3wyHWWKgK6J2E9TuCareyqm0TzVkThxfLft vIvoPigYxYz3yK8V7jlJf4nafQAw6qFQDXG5ilcxERibZR7oVFEuFL3fcPC3ZE5A+yOH 1EVRvqTrOlkJykAuU2je3S/dURbZi8Guhmc53d27YhKThe9fqx0lOmN0sV3EEuqDX2Kt q0rcIEwLAvtUkVzS9+L3Ca7lYBz57t/AoGTJ1WjxhvRDf1XkCX5tAKo69tvar2KVa0tu eGQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=Ffkshrxv; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=QUARANTINE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j125-v6si1095017pgc.553.2018.04.27.04.47.58; Fri, 27 Apr 2018 04:47:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=Ffkshrxv; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=QUARANTINE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758080AbeD0Lry (ORCPT + 5 others); Fri, 27 Apr 2018 07:47:54 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:46561 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758058AbeD0Lrv (ORCPT ); Fri, 27 Apr 2018 07:47:51 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w3RBlkE7009500; Fri, 27 Apr 2018 06:47:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1524829666; bh=i4ffc1wBb0ZaIwueilNMtoofKvDLvpt/VDkGhkiYphc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FfkshrxvdBKkCqInKPUvbf3uF53Mg9BFoWGlskoNIFqgJSzN6yKs8fIwoPsl/Id/G WD/v4TuvFDQljCfesQ08XIjY9ejekcsUwHhIXTRI2wKmx+a6UxF1ZMRwlu1JH25fNQ iztghVistdOkk/CbFKkIQ6i/VxgJNNNRAHEssFW0= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3RBlkQh020906; Fri, 27 Apr 2018 06:47:46 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 27 Apr 2018 06:47:45 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 27 Apr 2018 06:47:45 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3RBlRSJ014207; Fri, 27 Apr 2018 06:47:43 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Adrian Hunter CC: Rob Herring , Mark Rutland , , , , , Subject: [PATCH v5 05/14] mmc: sdhci: Disable 1.8v modes (HS200/HS400/UHS) if controller can't support 1.8v Date: Fri, 27 Apr 2018 17:17:14 +0530 Message-ID: <20180427114723.2687-6-kishon@ti.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180427114723.2687-1-kishon@ti.com> References: <20180427114723.2687-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The SDHCI controller in a SoC might support HS200/HS400 (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property), but if the board is modeled such that the IO lines are not connected to 1.8v then HS200/HS400 cannot be supported. Disable HS200/HS400 if the board does not have 1.8v connected to the IO lines. Also Disable DDR/UHS in 1.8v if the IO lines are not connected to 1.8v. Signed-off-by: Kishon Vijay Abraham I Acked-by: Tony Lindgren --- drivers/mmc/host/sdhci.c | 10 ++++++++++ include/linux/mmc/host.h | 4 ++++ 2 files changed, 14 insertions(+) -- 2.17.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 2ededa7f43df..0f3cdca3e769 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -3672,6 +3672,16 @@ int sdhci_setup_host(struct sdhci_host *host) if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_DDR50); + /* + * The SDHCI controller in a SoC might support HS200/HS400 + * (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property), + * but if the board is modeled such that the IO lines are not + * connected to 1.8v then HS200/HS400 cannot be supported. + * Disable HS200/HS400 if the board does not have 1.8v connected + * to the IO lines. (Applicable for other modes in 1.8v) + */ + mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HS400_ES); + mmc->caps &= ~(MMC_CAP_1_8V_DDR | MMC_CAP_UHS); } /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 7c6eaf63f5ce..8f1859044db1 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -320,6 +320,9 @@ struct mmc_host { #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ +#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ + MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ + MMC_CAP_UHS_DDR50) /* (1 << 21) is free for reuse */ #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ @@ -345,6 +348,7 @@ struct mmc_host { #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ MMC_CAP2_HS400_1_2V) +#define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V) #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V) #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */