From patchwork Wed Aug 16 13:45:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 110250 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp805799qge; Wed, 16 Aug 2017 06:46:18 -0700 (PDT) X-Received: by 10.98.43.78 with SMTP id r75mr1693757pfr.269.1502891178014; Wed, 16 Aug 2017 06:46:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502891178; cv=none; d=google.com; s=arc-20160816; b=ufygMBRUEvfEMtrSlOerr4oPZm6IovIRvNtVFdzSFm/MVOt7kASEOLYSdA59Cg03VJ T+Mn1aCfNhJsxTjCcZEHMnEPlSZcNSwHMF4kzkOBU3NLKZoEvnMI/NqyPG0k183p3JwZ UBlUuQqhNmRaDizELp/eQMihOctcvb7zB+qTf2QG9d1o45Fed634/M5/Tm1yWylNw/39 +yCvh12+mdenAPsjViiRtuSoc4CMGpYOB1hD10K0+KX3OUdI1cJmkGwp0+BEm2rX93ol oxkTmXzgRGwX9m3Ur/RutW4yaI4QreKk8VXHNKaTVYMXKQbBNbdwo1X5GQXt9HQda4Vw +dng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=Htb8sJvGYl5rPlX2sUwiJn9fLPr7ZBFaENSJX7VPKAw=; b=1A6JwLVnsYN2GE2v2HXBEgbz4IHa1lOdvnDsfjaQfFIiZL6gNBCCn2zFcEhMIqFQnc Kl1Pyp8vZUmvds9UOTvSA+o821Xhov66wQUH1cxfM8asa/M6F063dsI+Rb/eJkbu6nEe T4Qo1YHItyD9lby+GyVwWAx+FGwG9NbOqrvLHJMhPoeLQkUVPX1TwZ3deTJzsaUIaMsT KSofXGPfvDapd1wcjzu4AQQI7ICuaA9aXNWmOn4I/hF8zGvGRokWUjhSX4adv4kKgyHX YUnNj8FIMcQdAAIJXJJ6gdowvBOWqIAhjk9zC7Ypglc3LOZjDoMopyLyrsyX93k6MUDz vu+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=ulm89Z2m; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f7si585353plm.889.2017.08.16.06.46.17; Wed, 16 Aug 2017 06:46:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=ulm89Z2m; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752336AbdHPNqP (ORCPT + 3 others); Wed, 16 Aug 2017 09:46:15 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:33447 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752330AbdHPNqL (ORCPT ); Wed, 16 Aug 2017 09:46:11 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7GDjavs031939; Wed, 16 Aug 2017 08:45:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1502891136; bh=b9YhaijK0pLK8CRXr8YxGPqE2y/bD/+/SfzC5EkwD3Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ulm89Z2mdsKQVPcUpj9QrSELtt2DktAMFLFsA/WDUswOYa5nwU7dWOLhlEn9JbhXh NJ+zORQvgjgygAKupNH/gzNxx10RHcUkDxf5lliTXEv7qWOLJB4/w+EV/NAlpSxBsR ate/KYvBIo12ullfLyufkLY4AtywT0Ub0YLs4k5U= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7GDjaWL004861; Wed, 16 Aug 2017 08:45:36 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Wed, 16 Aug 2017 08:45:36 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Wed, 16 Aug 2017 08:45:36 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7GDjCAa017583; Wed, 16 Aug 2017 08:45:34 -0500 From: Kishon Vijay Abraham I To: Tony Lindgren CC: , , , , , , Subject: [PATCH v2 08/10] ARM: dts: dra72-evm: Add pinmux configuration for MMC Date: Wed, 16 Aug 2017 19:15:06 +0530 Message-ID: <20170816134508.8887-9-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170816134508.8887-1-kishon@ti.com> References: <20170816134508.8887-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay configuration values for the various MMC modes for dra72 SoC and use it in the pinctrl properties of MMC devicetree nodes present in dra72-evm.dts. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra72-evm.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 99fdb3d8445b..c572693b1665 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -6,6 +6,7 @@ * published by the Free Software Foundation. */ #include "dra72-evm-common.dtsi" +#include "dra72x-mmc-iodelay.dtsi" / { model = "TI DRA722"; @@ -55,9 +56,22 @@ }; &mmc1 { + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_hs>; + pinctrl-2 = <&mmc1_pins_sdr12>; + pinctrl-3 = <&mmc1_pins_sdr25>; + pinctrl-4 = <&mmc1_pins_sdr50>; + pinctrl-5 = <&mmc1_pins_ddr50_rev10>; + pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev10_conf>; vqmmc-supply = <&ldo1_reg>; }; &mmc2 { + pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; + pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_hs>; + pinctrl-2 = <&mmc2_pins_ddr_rev10>; + pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev10_conf>; vmmc-supply = <&evm_1v8_sw>; };