From patchwork Wed Aug 7 13:04:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 170754 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp7119230ile; Wed, 7 Aug 2019 06:05:10 -0700 (PDT) X-Google-Smtp-Source: APXvYqzip5pFOWjpwtGEClmrSv1YT+ogkyr62KIFOFKkg6nspXkudC8jXl7yX2q7GI4++dycnJmF X-Received: by 2002:aa7:92d2:: with SMTP id k18mr9193401pfa.153.1565183110266; Wed, 07 Aug 2019 06:05:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565183110; cv=none; d=google.com; s=arc-20160816; b=qXVnoJ4tB6Qwvs3abIaiEtb9fGdfQ5BrdDtrLovpno4JSbRfXxgK+NF1UOKP+NUzpz T+jvJxJSRKGAY9SiawaBSDQFncTDdQErHkeatEki7VVu4XopxdPdKLzBVd368euN60he QgedKjbHX1uADULCTEEYjqrz0mfX/wwfYJvNktBiPUe+j2Msb3hE3nFEZQapxe9iGABw UuCe2qr2TNtC5+mR9RoNeDTOk/Zqv0Esf8g+KYcPVgaLtm70KwhfdtH6ppW1uWkvUZkH Wb0PhcDRAe0UjjuV4ryuismLhIm/2j5dGRoq3wr6IkBu8axgsfLimSjjFfXkNx9xhLbU 91ZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=frBLaLQ0BrBJmM1vM+OF6FUfFxBudXkh00pQru7C5JM=; b=s0WYUVhcxSZCx1RCjZT9LbwyijtIbg0jl/Orx2/30AYEviAABeRLv/x0BerDVS8yQR 8wkPdxZYr5ndnH6qTRr2mBCfORbF/ddcDWvDAOJCDOnly0x1tC+0zEKho1t0dps+Ui8z hdd7aRTx4NhFWfXl6J4Kyl1faYKBaASluYP8kv7SP3Kq6FDOY5j58H+BGZEC4h9cy2gR MYMX0fxEfPpGgbpu8eog1wnqyCQkUJBmNoeecwS5gx++eI7JPcQv0+R4fZIzky+ZNBYk AxGrrFAcgnT/ygeyioizt2CQdM0ajmU1jGoKVq0ZIwtmIJT441X67w3NeF25PIxySqin 4mSQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yhGRoa2l; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e3si3836821pfi.148.2019.08.07.06.05.10; Wed, 07 Aug 2019 06:05:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yhGRoa2l; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388021AbfHGNFJ (ORCPT + 5 others); Wed, 7 Aug 2019 09:05:09 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:51486 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387476AbfHGNFJ (ORCPT ); Wed, 7 Aug 2019 09:05:09 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x77D564I056045; Wed, 7 Aug 2019 08:05:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1565183106; bh=frBLaLQ0BrBJmM1vM+OF6FUfFxBudXkh00pQru7C5JM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yhGRoa2lKVLMRRSFEke20CwxVEQdR6YaEARQTamupOkpFJl/NcCIGoyjnr8relvTQ ZFdVjcHV1rw7YlngjMlz1rb4vdw0LWzu2j3JWdBKf4KCU/NXzVJNA9q4u9aGoI/w/J v6ltniz+5H0/UBdRUa5dWnuJZcOaswoK0FJtHGho= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x77D56aE039779 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 7 Aug 2019 08:05:06 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 7 Aug 2019 08:05:06 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 7 Aug 2019 08:05:06 -0500 Received: from gomoku.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x77D4i1e081508; Wed, 7 Aug 2019 08:05:03 -0500 From: Tero Kristo To: , , CC: , , Subject: [PATCH 2/3] clk: ti: dra7xx: remove idlest polling from disabling ipu/dsp clocks Date: Wed, 7 Aug 2019 16:04:38 +0300 Message-ID: <1565183079-27798-3-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565183079-27798-1-git-send-email-t-kristo@ti.com> References: <1565183079-27798-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org These cause some unwanted timeouts in the kernel, as they depend on reset and the execution state of the remotecore itself. These details should be handled by the driver with proper sequencing of events. Signed-off-by: Tero Kristo --- drivers/clk/ti/clk-7xx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index b57fe09..5208eb8 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -25,7 +25,7 @@ }; static const struct omap_clkctrl_reg_data dra7_dsp1_clkctrl_regs[] __initconst = { - { DRA7_DSP1_MMU0_DSP1_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_dsp_m2_ck" }, + { DRA7_DSP1_MMU0_DSP1_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLE_POLL, "dpll_dsp_m2_ck" }, { 0 }, }; @@ -41,7 +41,7 @@ }; static const struct omap_clkctrl_reg_data dra7_ipu1_clkctrl_regs[] __initconst = { - { DRA7_IPU1_MMU_IPU1_CLKCTRL, dra7_mmu_ipu1_bit_data, CLKF_HW_SUP, "ipu1-clkctrl:0000:24" }, + { DRA7_IPU1_MMU_IPU1_CLKCTRL, dra7_mmu_ipu1_bit_data, CLKF_HW_SUP | CLKF_NO_IDLE_POLL, "ipu1-clkctrl:0000:24" }, { 0 }, }; @@ -137,7 +137,7 @@ }; static const struct omap_clkctrl_reg_data dra7_dsp2_clkctrl_regs[] __initconst = { - { DRA7_DSP2_MMU0_DSP2_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_dsp_m2_ck" }, + { DRA7_DSP2_MMU0_DSP2_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLE_POLL, "dpll_dsp_m2_ck" }, { 0 }, }; @@ -164,7 +164,7 @@ }; static const struct omap_clkctrl_reg_data dra7_ipu2_clkctrl_regs[] __initconst = { - { DRA7_IPU2_MMU_IPU2_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_core_h22x2_ck" }, + { DRA7_IPU2_MMU_IPU2_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLE_POLL, "dpll_core_h22x2_ck" }, { 0 }, };