From patchwork Thu Apr 4 08:11:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 161761 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp1297784jan; Thu, 4 Apr 2019 01:12:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqxG1mWauVohgD1ioXSmfbgdvHHeG2cfOtNUqPLPTI7L47fJ7DWXUx5gmhHhxUMBA8FTJqOc X-Received: by 2002:a17:902:bd92:: with SMTP id q18mr4988557pls.136.1554365548424; Thu, 04 Apr 2019 01:12:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1554365548; cv=none; d=google.com; s=arc-20160816; b=sq1N+e6alhlY/scbywBuiwPyAu+3ep2QGI1VbFa73rCMflNGLGOfJ9o45Tgszk4sai eY5o06+LiVJ4JMO7dGhiMzx9Ua9pXNX8ipEswyeuvHEve8b8U3mP2zAXZoPaA3Y7GN4k aulZk8+tNoNclLgzy6jpzSXqKtlW532C12l1uRU9SG6DepSAuuqPxREIxLvgxPHvYXuD RPO0ql6QKyXswIUXMyXEPzXzTaZy90A+ynpFuqgE5VFAEgXdbQpreUIOgNJHUWXAJB1P UdxF+iRqZb64AsifmAs3tEQJVafxMKpBO48hOHY+b/bXC7cX/JQKIyD8ArkYenCpEgu7 klog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=u1BDcpB9Luji9THZ2a0p38Y1IcnamjpjRDhQB0NQC40=; b=Rxp3E2yj9VKtXUwGCMqQFwKDRgkDD9n/Pfg+8leaWg5UdNCn0WBTi+/9ska7Ulxb0G vhD+sGJrV2vMAI4OI494/7jYHg2A1hZJOzBPprQkMqwhWqdfXcI//Dmuze1aZDRfX33L 88IYEUMSbx2gqkA+i8alYLe98LHNXVOxBIJ2oEK7ws5tWYaD3jOkvVKvchX2b0N3U4U/ kCmI0IqsegudfuNcTMBPUGChISNCI0or1SKOkyU4pAlmC+GLFaDBzt9VMq7yXcQCzmi3 F2974eU6kobzJh3D5JflLvkl8sjjf12wSG9n0msn+6oECbtCgiEPRLAQWAetUJG+2mSv OEYQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xz+l2W48; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m12si7767545pgv.586.2019.04.04.01.12.28; Thu, 04 Apr 2019 01:12:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xz+l2W48; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726694AbfDDIM1 (ORCPT + 5 others); Thu, 4 Apr 2019 04:12:27 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:45364 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725914AbfDDIM1 (ORCPT ); Thu, 4 Apr 2019 04:12:27 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x348COnP057241; Thu, 4 Apr 2019 03:12:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1554365544; bh=u1BDcpB9Luji9THZ2a0p38Y1IcnamjpjRDhQB0NQC40=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xz+l2W48lVsx1QaK/zJyDVJGu0WWW+IJky76jdzMPwdey/dTweehrOHhlrARE6ArG Y5r+Cgn4dNGzMshID5b+y/LjrbXcGyNBODAr4/Ia+4A5TUSYp9i7JDQgEHlkfvpkrV lTQGBxNPpSV+eZ6WQuGxgINly+o2FVLO3tx7TiDQ= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x348COg6056191 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 4 Apr 2019 03:12:24 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 4 Apr 2019 03:12:23 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 4 Apr 2019 03:12:23 -0500 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x348C8GC093305; Thu, 4 Apr 2019 03:12:21 -0500 From: Tero Kristo To: , , , CC: , Eric Ruei Subject: [PATCH 5/6] clk: ti: am33xx: drop idlest polling from gfx clkctrl clock Date: Thu, 4 Apr 2019 11:11:06 +0300 Message-ID: <1554365467-1325-6-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1554365467-1325-1-git-send-email-t-kristo@ti.com> References: <1554365467-1325-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Eric Ruei The GFX modules on AM33xx SoCs have a hardreset line and are controlled by a GFX reset line. Any clkctrl enable/disable operations cannot be checked for module enabled/disabled status independent of the reset operation, and this causes some unwanted timeouts in the kernel and unbalanced states for the GFX clocks. These details should be handled by the driver integration code itself. Signed-off-by: Eric Ruei Signed-off-by: Tero Kristo --- drivers/clk/ti/clk-33xx-compat.c | 2 +- drivers/clk/ti/clk-33xx.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clk-33xx-compat.c b/drivers/clk/ti/clk-33xx-compat.c index 3e07f12..d11fb42 100644 --- a/drivers/clk/ti/clk-33xx-compat.c +++ b/drivers/clk/ti/clk-33xx-compat.c @@ -181,7 +181,7 @@ }; static const struct omap_clkctrl_reg_data am3_gfx_l3_clkctrl_regs[] __initconst = { - { AM3_GFX_CLKCTRL, NULL, CLKF_SW_SUP, "gfx_fck_div_ck" }, + { AM3_GFX_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "gfx_fck_div_ck" }, { 0 }, }; diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c index a360d31..7436e0f 100644 --- a/drivers/clk/ti/clk-33xx.c +++ b/drivers/clk/ti/clk-33xx.c @@ -217,7 +217,7 @@ }; static const struct omap_clkctrl_reg_data am3_gfx_l3_clkctrl_regs[] __initconst = { - { AM3_GFX_L3_GFX_CLKCTRL, NULL, CLKF_SW_SUP, "gfx_fck_div_ck" }, + { AM3_GFX_L3_GFX_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "gfx_fck_div_ck" }, { 0 }, };