From patchwork Mon Nov 22 15:54:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 518518 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 799CEC43217 for ; Mon, 22 Nov 2021 15:56:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240416AbhKVP7y (ORCPT ); Mon, 22 Nov 2021 10:59:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240438AbhKVP7m (ORCPT ); Mon, 22 Nov 2021 10:59:42 -0500 Received: from laurent.telenet-ops.be (laurent.telenet-ops.be [IPv6:2a02:1800:110:4::f00:19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13CBBC061394 for ; Mon, 22 Nov 2021 07:56:23 -0800 (PST) Received: from ramsan.of.borg ([84.195.186.194]) by laurent.telenet-ops.be with bizsmtp id MTvi2600Z4C55Sk01TviwZ; Mon, 22 Nov 2021 16:56:23 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1mpBe6-00EL3i-LK; Mon, 22 Nov 2021 16:54:18 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1mpBe5-00HGzM-PZ; Mon, 22 Nov 2021 16:54:17 +0100 From: Geert Uytterhoeven To: Tony Lindgren , Russell King , Rajendra Nayak , Paul Walmsley , Michael Turquette , Stephen Boyd , Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , Tero Kristo , Jonathan Cameron , Lars-Peter Clausen , Lorenzo Bianconi , Benoit Parrot , Mauro Carvalho Chehab , Adrian Hunter , Andrew Jeffery , Ulf Hansson , Joel Stanley , Ping-Ke Shih , Kalle Valo , "David S . Miller" , Jakub Kicinski , Linus Walleij , Liam Girdwood , Mark Brown , Magnus Damm , Eduardo Valentin , Keerthy , "Rafael J . Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Jaroslav Kysela , Takashi Iwai Cc: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-iio@vger.kernel.org, linux-media@vger.kernel.org, linux-mmc@vger.kernel.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, linux-wireless@vger.kernel.org, netdev@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, alsa-devel@alsa-project.org, Geert Uytterhoeven Subject: [PATCH/RFC 12/17] pinctrl: aspeed: Use bitfield helpers Date: Mon, 22 Nov 2021 16:54:05 +0100 Message-Id: <15158715ad2278191e310ac5a8d3dba7cc4fb9cc.1637592133.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Use the field_{get,prep}() helpers, instead of open-coding the same operations. Signed-off-by: Geert Uytterhoeven --- Compile-tested only. Marked RFC, as this depends on [PATCH 01/17], but follows a different path to upstream. --- drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 3 ++- drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 3 ++- drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 3 ++- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 5 +++-- drivers/pinctrl/aspeed/pinmux-aspeed.c | 6 ++++-- 5 files changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c index bfed0e2746437b4a..bfb2a7b229915a68 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2016 IBM Corp. */ +#include #include #include #include @@ -2551,7 +2552,7 @@ static int aspeed_g4_sig_expr_set(struct aspeed_pinmux_data *ctx, for (i = 0; i < expr->ndescs; i++) { const struct aspeed_sig_desc *desc = &expr->descs[i]; u32 pattern = enable ? desc->enable : desc->disable; - u32 val = (pattern << __ffs(desc->mask)); + u32 val = field_prep(desc->mask, pattern); if (!ctx->maps[desc->ip]) return -ENODEV; diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c index 4c0d26606b6cc7d6..8cc6d9c1f1c78296 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c @@ -2,6 +2,7 @@ /* * Copyright (C) 2016 IBM Corp. */ +#include #include #include #include @@ -2724,7 +2725,7 @@ static int aspeed_g5_sig_expr_set(struct aspeed_pinmux_data *ctx, for (i = 0; i < expr->ndescs; i++) { const struct aspeed_sig_desc *desc = &expr->descs[i]; u32 pattern = enable ? desc->enable : desc->disable; - u32 val = (pattern << __ffs(desc->mask)); + u32 val = field_prep(desc->mask, pattern); struct regmap *map; map = aspeed_g5_acquire_regmap(ctx, desc->ip); diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c index a3fa03bcd9a30577..00f7b69a74e9e743 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* Copyright (C) 2019 IBM Corp. */ +#include #include #include #include @@ -2649,7 +2650,7 @@ static int aspeed_g6_sig_expr_set(struct aspeed_pinmux_data *ctx, for (i = 0; i < expr->ndescs; i++) { const struct aspeed_sig_desc *desc = &expr->descs[i]; u32 pattern = enable ? desc->enable : desc->disable; - u32 val = (pattern << __ffs(desc->mask)); + u32 val = field_prep(desc->mask, pattern); bool is_strap; if (!ctx->maps[desc->ip]) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index c94e24aadf922d2a..839ac48f75836352 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -3,6 +3,7 @@ * Copyright (C) 2016 IBM Corp. */ +#include #include #include #include @@ -547,7 +548,7 @@ int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset, return rc; pmap = find_pinconf_map(pdata, param, MAP_TYPE_VAL, - (val & pconf->mask) >> __ffs(pconf->mask)); + field_get(pconf->mask, val)); if (!pmap) return -EINVAL; @@ -595,7 +596,7 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset, if (WARN_ON(!pmap)) return -EINVAL; - val = pmap->val << __ffs(pconf->mask); + val = field_prep(pconf->mask, pmap->val); rc = regmap_update_bits(pdata->scu, pconf->reg, pconf->mask, val); diff --git a/drivers/pinctrl/aspeed/pinmux-aspeed.c b/drivers/pinctrl/aspeed/pinmux-aspeed.c index 4aa46383c2c533f0..61ddd550439325ee 100644 --- a/drivers/pinctrl/aspeed/pinmux-aspeed.c +++ b/drivers/pinctrl/aspeed/pinmux-aspeed.c @@ -3,6 +3,8 @@ /* Pieces to enable drivers to implement the .set callback */ +#include + #include "pinmux-aspeed.h" static const char *const aspeed_pinmux_ips[] = { @@ -17,7 +19,7 @@ static inline void aspeed_sig_desc_print_val( pr_debug("Want %s%X[0x%08X]=0x%X, got 0x%X from 0x%08X\n", aspeed_pinmux_ips[desc->ip], desc->reg, desc->mask, enable ? desc->enable : desc->disable, - (rv & desc->mask) >> __ffs(desc->mask), rv); + field_get(desc->mask, rv), rv); } /** @@ -55,7 +57,7 @@ int aspeed_sig_desc_eval(const struct aspeed_sig_desc *desc, aspeed_sig_desc_print_val(desc, enabled, raw); want = enabled ? desc->enable : desc->disable; - return ((raw & desc->mask) >> __ffs(desc->mask)) == want; + return field_get(desc->mask, raw) == want; } /**