From patchwork Fri Nov 3 14:26:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 117908 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp3532885qgn; Fri, 3 Nov 2017 07:28:07 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TzclTmxlaBxcWk09MHiQmX52sBR2r4q4ICrt9HqDW173ycw/B/x5y2k7p83QisvfZoZ/37 X-Received: by 10.159.234.68 with SMTP id c4mr6871071plr.52.1509719287708; Fri, 03 Nov 2017 07:28:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509719287; cv=none; d=google.com; s=arc-20160816; b=e4RnaKCw0OIUnk/TalPEzLjtXE9BCMrS9GjCa/waizKCf4OopdIcoDENAYMWZ1ETAw pInnQwYb8U/Vjav9FxV/LrOOOJt6MuafDvDgPqgZ9lfSpHvRt+iXMT0BxlckRor0f5Ki uGsitwVjo+iVbF5IM5X0bzPhaEkqsuiGiR2pGrIZ2/g0bScvVLOCR0oHe+K8qUJq5xTA Bo44mOPTFqjauDumfl2Tjprb9F2Tb/O7jaC/Eta33EYBe6HGhhHbo4JoLDuyCi0jz1mN 7S00HzYngyOYfBY16nzOb5Jln4EyZAVlJsoKhYdL2gCowMuajQOgHWBtdTtFKgPJGSJJ iVVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=Kt5Cn22SWt++M/JfkbaPa7VB6jUD3tKH+ST0jgkxmZ0=; b=n/RyREv1K+FRmDymDP+4XqqAhM0SiWUENnCm2GdrNpvHhPjxafY9B4sZtQIwSlyPOB s4SolJN9haib1ZFi2YyMENOxKB1Em/YMyN4gd40Sr2iiXknAM2Am4RCLu+VO7JHH2zqJ gj2KErKXqmZYfKNxxzwrjqsql18xdmaa+THa6QhiYAX3UdZuvncq4x978KcJ+pHRqkMs wEXbzWUMDWx0y3swws8Xq2uGoLqNpf1Di9DeLtC32ERZ0b0ncQ9i1INaXSsDImb3esuf TU8Q3gfIoaiOASlu0/I0M4kLmk+NBK7JveYPJsRDuZvfdeEcw4YAPt/WdEBIgdiK9nDz +cBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=P29WO5r4; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t1si4866060plb.265.2017.11.03.07.28.07; Fri, 03 Nov 2017 07:28:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=P29WO5r4; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754718AbdKCO2E (ORCPT + 4 others); Fri, 3 Nov 2017 10:28:04 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:34541 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754684AbdKCO2D (ORCPT ); Fri, 3 Nov 2017 10:28:03 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id vA3EQxw0024073; Fri, 3 Nov 2017 09:26:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1509719219; bh=/UBUdMivsQMOnNfG+SLsxS4PQ9Ohd+/xeVjDRHiIXzw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=P29WO5r41yASsXH+0Lwfx2uoQA/epfVN7tWxcTZVxUT8J3RsNKX8AdDvd+3WY/bRN lCcuVP8QKD/qiT5sxBFBxels408OcPhvDn0LLacAHUcA2QNp6/1WbOtQzmOYbHSnkT cr4NeSD9cgeMHcVs8IjWlcIqalTAOl3hJHs6nlpQ= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA3EQsTl010963; Fri, 3 Nov 2017 09:26:54 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Fri, 3 Nov 2017 09:26:54 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Fri, 3 Nov 2017 09:26:54 -0500 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA3EQovt014982; Fri, 3 Nov 2017 09:26:53 -0500 From: Tero Kristo To: , CC: Subject: [PATCH 1/7] ARM: OMAP2+: CM: add support for getting phys address for a clkctrl register Date: Fri, 3 Nov 2017 16:26:35 +0200 Message-ID: <1509719201-32700-2-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1509719201-32700-1-git-send-email-t-kristo@ti.com> References: <1509719201-32700-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add a new CM API for fetching the physical address of a hwmod clkctrl register. This is needed to map omap hwmods against clkctrl clocks, the existing support for clkdm address translation was not sufficient to handle the mutant cases where the clockdomain offset is completely off from the clkctrl ones. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/cm.h | 3 +++ arch/arm/mach-omap2/cm_common.c | 10 ++++++++++ 2 files changed, 13 insertions(+) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index e833984..39c9c10 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -52,6 +52,7 @@ * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl * @module_enable: ptr to the SoC CM-specific module_enable impl * @module_disable: ptr to the SoC CM-specific module_disable impl + * @xlate_clkctrl: ptr to the SoC CM-specific clkctrl xlate addr impl */ struct cm_ll_data { int (*split_idlest_reg)(struct clk_omap_reg *idlest_reg, s16 *prcm_inst, @@ -62,6 +63,7 @@ struct cm_ll_data { u8 idlest_shift); void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs); void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs); + u32 (*xlate_clkctrl)(u8 part, u16 inst, u16 clkctrl_offs); }; extern int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst, @@ -72,6 +74,7 @@ int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift); int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs); int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs); +u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs); extern int cm_register(struct cm_ll_data *cld); extern int cm_unregister(struct cm_ll_data *cld); int omap_cm_init(void); diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index d555791..1752e92 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -175,6 +175,16 @@ int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs) return 0; } +u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs) +{ + if (!cm_ll_data->xlate_clkctrl) { + WARN_ONCE(1, "cm: %s: no low-level function defined\n", + __func__); + return 0; + } + return cm_ll_data->xlate_clkctrl(part, inst, clkctrl_offs); +} + /** * cm_register - register per-SoC low-level data with the CM * @cld: low-level per-SoC OMAP CM data & function pointers to register