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[209.132.180.67]) by mx.google.com with ESMTP id 3si5739621plx.9.2017.03.09.00.06.25; Thu, 09 Mar 2017 00:06:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753670AbdCIIGM (ORCPT + 4 others); Thu, 9 Mar 2017 03:06:12 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:43527 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752575AbdCIH67 (ORCPT ); Thu, 9 Mar 2017 02:58:59 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v297w1Nr000832; Thu, 9 Mar 2017 01:58:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1489046281; bh=lGOprQB69gbhYcDuFoHnIvnAtly0AN4JpA9ltUf/+YI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WeQ4p9f4UM3XHYEkRwfJQttR2y/ezLwg6u1lPiz3V9Wg7wivUdy7aybL+b3bla6tQ P+cs4MbU6Uwtw+JyJ7le8DvNlDfrDg0GMt9uDJgRSw2f9MbsFJ4JvbhAWI0XqTwVpU teFdj3KFCr62Ry0yARpvIVX59Sak1j+4bh4UMpgE= Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v297w14F019902; Thu, 9 Mar 2017 01:58:01 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 9 Mar 2017 01:58:00 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v297vZP4014250; Thu, 9 Mar 2017 01:57:57 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Joao Pinto , , , , , , CC: , , Subject: [PATCH v3 06/23] Documentation: PCI: Add specification for the *pci test* function device Date: Thu, 9 Mar 2017 13:27:17 +0530 Message-ID: <1489046254-19919-7-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489046254-19919-1-git-send-email-kishon@ti.com> References: <1489046254-19919-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add specification for the *pci test* virtual function device. The endpoint function driver and the host pci driver should be created based on this specification. Signed-off-by: Kishon Vijay Abraham I --- Documentation/PCI/00-INDEX | 2 + Documentation/PCI/endpoint/pci-test-function.txt | 66 ++++++++++++++++++++++ 2 files changed, 68 insertions(+) create mode 100644 Documentation/PCI/endpoint/pci-test-function.txt -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/PCI/00-INDEX b/Documentation/PCI/00-INDEX index f84a23c..4e5a283 100644 --- a/Documentation/PCI/00-INDEX +++ b/Documentation/PCI/00-INDEX @@ -16,3 +16,5 @@ endpoint/pci-endpoint.txt - guide to add endpoint controller driver and endpoint function driver. endpoint/pci-endpoint-cfs.txt - guide to use configfs to configure the pci endpoint function. +endpoint/pci-test-function.txt + - specification of *pci test* function device. diff --git a/Documentation/PCI/endpoint/pci-test-function.txt b/Documentation/PCI/endpoint/pci-test-function.txt new file mode 100644 index 0000000..1324376 --- /dev/null +++ b/Documentation/PCI/endpoint/pci-test-function.txt @@ -0,0 +1,66 @@ + PCI TEST + Kishon Vijay Abraham I + +Traditionally PCI RC has always been validated by using standard +PCI cards like ethernet PCI cards or USB PCI cards or SATA PCI cards. +However with the addition of EP-core in linux kernel, it is possible +to configure a PCI controller that can operate in EP mode to work as +a test device. + +The PCI endpoint test device is a virtual device (defined in software) +used to test the endpoint functionality and serve as a sample driver +for other PCI endpoint devices (to use the EP framework). + +The PCI endpoint test device has the following registers: + + 1) PCI_ENDPOINT_TEST_MAGIC + 2) PCI_ENDPOINT_TEST_COMMAND + 3) PCI_ENDPOINT_TEST_STATUS + 4) PCI_ENDPOINT_TEST_SRC_ADDR + 5) PCI_ENDPOINT_TEST_DST_ADDR + 6) PCI_ENDPOINT_TEST_SIZE + 7) PCI_ENDPOINT_TEST_CHECKSUM + +*) PCI_ENDPOINT_TEST_MAGIC + +This register will be used to test BAR0. A known pattern will be written +and read back from MAGIC register to verify BAR0. + +*) PCI_ENDPOINT_TEST_COMMAND: + +This register will be used by the host driver to indicate the function +that the endpoint device must perform. + +Bitfield Description: + Bit 0 : raise legacy irq + Bit 1 : raise MSI irq + Bit 2 - 7 : MSI interrupt number + Bit 8 : read command (read data from RC buffer) + Bit 9 : write command (write data to RC buffer) + Bit 10 : copy command (copy data from one RC buffer to another + RC buffer) + +*) PCI_ENDPOINT_TEST_STATUS + +This register reflects the status of the PCI endpoint device. + +Bitfield Description: + Bit 0 : read success + Bit 1 : read fail + Bit 2 : write success + Bit 3 : write fail + Bit 4 : copy success + Bit 5 : copy fail + Bit 6 : irq raised + Bit 7 : source address is invalid + Bit 8 : destination address is invalid + +*) PCI_ENDPOINT_TEST_SRC_ADDR + +This register contains the source address (RC buffer address) for the +COPY/READ command. + +*) PCI_ENDPOINT_TEST_DST_ADDR + +This register contains the destination address (RC buffer address) for +the COPY/WRITE command.