From patchwork Mon Jun 13 19:04:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 69925 Delivered-To: patch@linaro.org Received: by 10.140.106.246 with SMTP id e109csp1692775qgf; Mon, 13 Jun 2016 12:06:53 -0700 (PDT) X-Received: by 10.36.17.207 with SMTP id 198mr1971745itf.81.1465844801990; Mon, 13 Jun 2016 12:06:41 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z9si19229983pau.40.2016.06.13.12.06.41; Mon, 13 Jun 2016 12:06:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423447AbcFMTGk (ORCPT + 3 others); Mon, 13 Jun 2016 15:06:40 -0400 Received: from bear.ext.ti.com ([198.47.19.11]:60878 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1424051AbcFMTFy (ORCPT ); Mon, 13 Jun 2016 15:05:54 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u5DJ5SW3003228; Mon, 13 Jun 2016 14:05:28 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5DJ5SgU019828; Mon, 13 Jun 2016 14:05:28 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Mon, 13 Jun 2016 14:05:28 -0500 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5DJ56Ss004255; Mon, 13 Jun 2016 14:05:24 -0500 From: Tero Kristo To: , , , , CC: Subject: [RESEND PATCHv2 06/28] ARM: OMAP2+: hwmod: fetch main_clk based on hwmod name Date: Mon, 13 Jun 2016 22:04:40 +0300 Message-ID: <1465844702-12200-7-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465844702-12200-1-git-send-email-t-kristo@ti.com> References: <1465844702-12200-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org With the transition to hwmod module clocks, all hwmods will have their main clocks named _mod_ck. Use this info to fetch main_clk, and use it if found. Also, if a main_clk is found based on the hwmod name, disable the direct PRCM modulemode access from hwmod. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/omap_hwmod.c | 49 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 44 insertions(+), 5 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 0ea869c..0c85f91 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -200,6 +200,7 @@ struct omap_hwmod_soc_ops { int (*init_clkdm)(struct omap_hwmod *oh); void (*update_context_lost)(struct omap_hwmod *oh); int (*get_context_lost)(struct omap_hwmod *oh); + int (*disable_direct_prcm)(struct omap_hwmod *oh); }; /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ @@ -776,17 +777,34 @@ static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh _clk (main - * functional clock pointer) if a main_clk is present. Returns 0 on - * success or -EINVAL on error. + * functional clock pointer) if a clock matching the hwmod name is found, + * or a main_clk is present. Returns 0 on success or -EINVAL on error. */ static int _init_main_clk(struct omap_hwmod *oh) { int ret = 0; + char name[32]; + static int max_len; + struct clk *clk; - if (!oh->main_clk) - return 0; + strcpy(name, oh->name); + strcat(name, "_mod_ck"); + + if (strlen(name) > max_len) + max_len = strlen(name); + + clk = ti_clk_get(name); + if (!IS_ERR(clk)) { + oh->_clk = clk; + soc_ops.disable_direct_prcm(oh); + oh->main_clk = kstrdup(name, GFP_KERNEL); + } else { + if (!oh->main_clk) + return 0; + + oh->_clk = ti_clk_get(oh->main_clk); + } - oh->_clk = ti_clk_get(oh->main_clk); if (IS_ERR(oh->_clk)) { pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n", oh->name, oh->main_clk); @@ -3091,6 +3109,25 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, } /** + * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod + * @oh: struct omap_hwmod * to disable control for + * + * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod + * will be using its main_clk to enable/disable the module. Returns + * 0 if successful. + */ +static int _omap4_disable_direct_prcm(struct omap_hwmod *oh) +{ + if (!oh) + return -EINVAL; + + oh->prcm.omap4.clkctrl_offs = 0; + oh->prcm.omap4.modulemode = 0; + + return 0; +} + +/** * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args * @oh: struct omap_hwmod * to deassert hardreset * @ohri: hardreset line data @@ -3913,6 +3950,7 @@ void __init omap_hwmod_init(void) soc_ops.init_clkdm = _init_clkdm; soc_ops.update_context_lost = _omap4_update_context_lost; soc_ops.get_context_lost = _omap4_get_context_lost; + soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() || soc_is_am43xx()) { soc_ops.enable_module = _omap4_enable_module; @@ -3922,6 +3960,7 @@ void __init omap_hwmod_init(void) soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; soc_ops.init_clkdm = _init_clkdm; + soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; } else { WARN(1, "omap_hwmod: unknown SoC type\n"); }