From patchwork Thu Apr 7 10:25:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 65280 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp378935lbc; Thu, 7 Apr 2016 03:26:37 -0700 (PDT) X-Received: by 10.98.2.22 with SMTP id 22mr3741057pfc.36.1460024771055; Thu, 07 Apr 2016 03:26:11 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id qy6si10887469pab.106.2016.04.07.03.26.10; Thu, 07 Apr 2016 03:26:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755909AbcDGK0K (ORCPT + 3 others); Thu, 7 Apr 2016 06:26:10 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:41840 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755895AbcDGK0I (ORCPT ); Thu, 7 Apr 2016 06:26:08 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u37AQ5WO017906; Thu, 7 Apr 2016 05:26:05 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u37AQ5sp012224; Thu, 7 Apr 2016 05:26:05 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Thu, 7 Apr 2016 05:26:04 -0500 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u37APfFf032760; Thu, 7 Apr 2016 05:26:03 -0500 From: Roger Quadros To: CC: , , , , Roger Quadros Subject: [PATCH 10/13] ARM: dts: dra7x-evm: Provide NAND ready pin Date: Thu, 7 Apr 2016 13:25:37 +0300 Message-ID: <1460024740-19716-11-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1460024740-19716-1-git-send-email-rogerq@ti.com> References: <1460024740-19716-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. Read speed increases from 13768 KiB/ to 17246 KiB/s. Write speed was unchanged at 7123 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7-evm.dts | 1 + arch/arm/boot/dts/dra72-evm.dts | 1 + 2 files changed, 2 insertions(+) -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index d9b8723..c1c6d6f 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -748,6 +748,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <16>; diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 6affe2d..c819724 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -503,6 +503,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <16>;