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[209.132.180.67]) by mx.google.com with ESMTP id tv2si20042739pac.119.2015.10.02.16.24.08; Fri, 02 Oct 2015 16:24:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750709AbbJBXYG (ORCPT + 7 others); Fri, 2 Oct 2015 19:24:06 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:35104 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751251AbbJBXX4 (ORCPT ); Fri, 2 Oct 2015 19:23:56 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id t92NNRxf030011; Fri, 2 Oct 2015 18:23:27 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t92NNRIp026790; Fri, 2 Oct 2015 18:23:27 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Fri, 2 Oct 2015 18:23:27 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t92NNQNk023784; Fri, 2 Oct 2015 18:23:26 -0500 Received: from localhost (irmo.am.dhcp.ti.com [128.247.9.166]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t92NNQ919823; Fri, 2 Oct 2015 18:23:26 -0500 (CDT) From: Suman Anna To: Tony Lindgren CC: , , , , Suman Anna Subject: [REPOST PATCH 1/4] ARM: dts: DRA7: Add dsp1_system syscon node Date: Fri, 2 Oct 2015 18:23:22 -0500 Message-ID: <1443828205-18706-2-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 2.6.0 In-Reply-To: <1443828205-18706-1-git-send-email-s-anna@ti.com> References: <1443828205-18706-1-git-send-email-s-anna@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: s-anna@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The DSP_SYSTEM sub-module is a dedicated system control logic module present within a DRA7 DSP processor sub-system. This module is responsible for power management, clock generation and connection to the device PRCM module. Add a syscon node for this module for the DSP1 processor sub-system. This is added as a syscon node as it is a common configuration module that can be used by the different IOMMU instances and the corresponding remoteproc device. The node is added to the common dra7.dtsi file, as the DSP1 processor sub-system is mostly common across all the variants of the DRA7 SoC family. Signed-off-by: Suman Anna --- arch/arm/boot/dts/dra7.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index e289c706d27d..62055094e8d5 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -292,6 +292,11 @@ #thermal-sensor-cells = <1>; }; + dsp1_system: dsp_system@40d00000 { + compatible = "syscon"; + reg = <0x40d00000 0x100>; + }; + sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>;