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[209.132.180.67]) by mx.google.com with ESMTP id ou3si18845730pbb.11.2015.09.24.07.27.47; Thu, 24 Sep 2015 07:27:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753028AbbIXO1r (ORCPT + 5 others); Thu, 24 Sep 2015 10:27:47 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:60755 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752979AbbIXO1q (ORCPT ); Thu, 24 Sep 2015 10:27:46 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t8OERQ1t008682; Thu, 24 Sep 2015 09:27:26 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8OERQE4013508; Thu, 24 Sep 2015 09:27:26 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Thu, 24 Sep 2015 09:27:26 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8OEQjRg012528; Thu, 24 Sep 2015 09:27:22 -0500 From: Tero Kristo To: , , , CC: Subject: [PATCH 17/17] ARM: OMAP2+: PRM: remove redundant system reset code Date: Thu, 24 Sep 2015 17:26:58 +0300 Message-ID: <1443104818-993-18-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1443104818-993-1-git-send-email-t-kristo@ti.com> References: <1443104818-993-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This is now handled via the reset controller and the provided information from DT, so the legacy support code is no longer needed. OMAP3 version shall be removed once OMAP3 is also DT only. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/prm2xxx.c | 15 --------------- arch/arm/mach-omap2/prm33xx.c | 18 ------------------ arch/arm/mach-omap2/prm44xx.c | 1 - arch/arm/mach-omap2/prminst44xx.c | 20 -------------------- 4 files changed, 54 deletions(-) diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index 752018ce..70f711b 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -101,20 +101,6 @@ static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst) } /** - * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC - * - * Set the DPLL reset bit, which should reboot the SoC. This is the - * recommended way to restart the SoC. No return value. - */ -static void omap2xxx_prm_dpll_reset(void) -{ - omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD, - OMAP2_RM_RSTCTRL); - /* OCP barrier */ - omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL); -} - -/** * omap2xxx_prm_clear_mod_irqs - clear wakeup status bits for a module * @module: PRM module to clear wakeups from * @regs: register offset to clear @@ -216,7 +202,6 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { .assert_hardreset = &omap2_prm_assert_hardreset, .deassert_hardreset = &omap2_prm_deassert_hardreset, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, - .reset_system = &omap2xxx_prm_dpll_reset, .clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs, }; diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index dcb5001..12b15a2 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -336,23 +336,6 @@ static int am33xx_check_vcvp(void) return 0; } -/** - * am33xx_prm_global_warm_sw_reset - reboot the device via warm reset - * - * Immediately reboots the device through warm reset. - */ -static void am33xx_prm_global_warm_sw_reset(void) -{ - am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK, - AM33XX_RST_GLOBAL_WARM_SW_MASK, - AM33XX_PRM_DEVICE_MOD, - AM33XX_PRM_RSTCTRL_OFFSET); - - /* OCP barrier */ - (void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD, - AM33XX_PRM_RSTCTRL_OFFSET); -} - struct pwrdm_ops am33xx_pwrdm_operations = { .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, @@ -375,7 +358,6 @@ static struct prm_ll_data am33xx_prm_ll_data = { .assert_hardreset = am33xx_prm_assert_hardreset, .deassert_hardreset = am33xx_prm_deassert_hardreset, .is_hardreset_asserted = am33xx_prm_is_hardreset_asserted, - .reset_system = am33xx_prm_global_warm_sw_reset, }; int __init am33xx_prm_init(const struct omap_prcm_init_data *data) diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 3076800..76d7e30 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -702,7 +702,6 @@ static struct prm_ll_data omap44xx_prm_ll_data = { .assert_hardreset = omap4_prminst_assert_hardreset, .deassert_hardreset = omap4_prminst_deassert_hardreset, .is_hardreset_asserted = omap4_prminst_is_hardreset_asserted, - .reset_system = omap4_prminst_global_warm_sw_reset, .vp_check_txdone = omap4_prm_vp_check_txdone, .vp_clear_txdone = omap4_prm_vp_clear_txdone, }; diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index d0b15db..ffed63f 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -174,23 +174,3 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst, return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } - - -void omap4_prminst_global_warm_sw_reset(void) -{ - u32 v; - s32 inst = omap4_prmst_get_prm_dev_inst(); - - if (inst == PRM_INSTANCE_UNKNOWN) - return; - - v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, inst, - OMAP4_PRM_RSTCTRL_OFFSET); - v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; - omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, - inst, OMAP4_PRM_RSTCTRL_OFFSET); - - /* OCP barrier */ - v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, - inst, OMAP4_PRM_RSTCTRL_OFFSET); -}