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[209.132.180.67]) by mx.google.com with ESMTP id ci13si3665255pac.227.2015.05.22.07.36.48; Fri, 22 May 2015 07:36:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757254AbbEVOgW (ORCPT + 5 others); Fri, 22 May 2015 10:36:22 -0400 Received: from mail-lb0-f169.google.com ([209.85.217.169]:32826 "EHLO mail-lb0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757252AbbEVOgK (ORCPT ); Fri, 22 May 2015 10:36:10 -0400 Received: by lbbzk7 with SMTP id zk7so14373753lbb.0 for ; Fri, 22 May 2015 07:36:08 -0700 (PDT) X-Received: by 10.152.1.4 with SMTP id 4mr6723889lai.25.1432305368911; Fri, 22 May 2015 07:36:08 -0700 (PDT) Received: from localhost ([195.238.92.128]) by mx.google.com with ESMTPSA id o5sm533918lag.9.2015.05.22.07.36.08 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 22 May 2015 07:36:08 -0700 (PDT) From: Grygorii Strashko To: Linus Walleij , Alexandre Courbot , tony@atomide.com Cc: Javier Martinez Canillas , ssantosh@kernel.org, Kevin Hilman , linux-omap@vger.kernel.org, linux-gpio@vger.kernel.org, Grygorii Strashko Subject: [RFC/RFT PATCH 4/7] gpio: omap: rework omap_gpio_request to touch only gpio specific registers Date: Fri, 22 May 2015 17:35:51 +0300 Message-Id: <1432305354-5968-5-git-send-email-grygorii.strashko@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432305354-5968-1-git-send-email-grygorii.strashko@linaro.org> References: <1432305354-5968-1-git-send-email-grygorii.strashko@linaro.org> Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: grygorii.strashko@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.182 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal, so GPIO Chip implementation shouldn't touch GPIO IRQ specific registers and vise versa. Hence, rework omap_gpio_request: - don't reset GPIO IRQ triggering type to IRQ_TYPE_NONE, because GPIO irqchip should be responsible for that; - call directly omap_enable_gpio_module as all needed checks are already present inside it. Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index d933b99..2fbd569 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -668,14 +668,7 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) pm_runtime_get_sync(bank->dev); spin_lock_irqsave(&bank->lock, flags); - /* Set trigger to none. You need to enable the desired trigger with - * request_irq() or set_irq_type(). Only do this if the IRQ line has - * not already been requested. - */ - if (!LINE_USED(bank->irq_usage, offset)) { - omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); - omap_enable_gpio_module(bank, offset); - } + omap_enable_gpio_module(bank, offset); bank->mod_usage |= BIT(offset); spin_unlock_irqrestore(&bank->lock, flags);