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[209.132.180.67]) by mx.google.com with ESMTP id ci13si3665255pac.227.2015.05.22.07.36.42; Fri, 22 May 2015 07:36:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757250AbbEVOgM (ORCPT + 5 others); Fri, 22 May 2015 10:36:12 -0400 Received: from mail-lb0-f170.google.com ([209.85.217.170]:36269 "EHLO mail-lb0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756486AbbEVOgI (ORCPT ); Fri, 22 May 2015 10:36:08 -0400 Received: by lbbqq2 with SMTP id qq2so14263969lbb.3 for ; Fri, 22 May 2015 07:36:07 -0700 (PDT) X-Received: by 10.153.6.36 with SMTP id cr4mr6838827lad.56.1432305367599; Fri, 22 May 2015 07:36:07 -0700 (PDT) Received: from localhost ([195.238.92.128]) by mx.google.com with ESMTPSA id x2sm533874laj.8.2015.05.22.07.36.06 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 22 May 2015 07:36:07 -0700 (PDT) From: Grygorii Strashko To: Linus Walleij , Alexandre Courbot , tony@atomide.com Cc: Javier Martinez Canillas , ssantosh@kernel.org, Kevin Hilman , linux-omap@vger.kernel.org, linux-gpio@vger.kernel.org, Grygorii Strashko Subject: [RFC/RFT PATCH 3/7] gpio: omap: rework omap_x_irq_shutdown to touch only irqs specific registers Date: Fri, 22 May 2015 17:35:50 +0300 Message-Id: <1432305354-5968-4-git-send-email-grygorii.strashko@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432305354-5968-1-git-send-email-grygorii.strashko@linaro.org> References: <1432305354-5968-1-git-send-email-grygorii.strashko@linaro.org> Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: grygorii.strashko@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal, so GPIO IRQ Chip implementation shouldn't touch GPIO specific registers and vise versa. Hence, rework omap_gpio_irq_shutdown and try to touch only irqs specific registers: - don't configure GPIO as input (it, actually, should be already configured as input). - don't clear debounce configuration if GPIO is still used as GPIO. We need to take in to account here commit c9c55d921115 ("gpio/omap: fix off-mode bug: clear debounce settings on free/reset"). Also remove omap_reset_gpio() function as it is not used any more. Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index f6cc638..d933b99 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -646,15 +646,6 @@ static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset, return 0; } -static void omap_reset_gpio(struct gpio_bank *bank, unsigned offset) -{ - omap_set_gpio_direction(bank, offset, 1); - omap_set_gpio_irqenable(bank, offset, 0); - omap_clear_gpio_irqstatus(bank, offset); - omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); - omap_clear_gpio_debounce(bank, offset); -} - /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) { @@ -821,8 +812,12 @@ static void omap_gpio_irq_shutdown(struct irq_data *d) spin_lock_irqsave(&bank->lock, flags); bank->irq_usage &= ~(BIT(offset)); + omap_set_gpio_irqenable(bank, offset, 0); + omap_clear_gpio_irqstatus(bank, offset); + omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); + if (!LINE_USED(bank->mod_usage, offset)) + omap_clear_gpio_debounce(bank, offset); omap_disable_gpio_module(bank, offset); - omap_reset_gpio(bank, offset); spin_unlock_irqrestore(&bank->lock, flags); /*