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[209.85.215.47]) by mx.google.com with ESMTPS id s2si1428855laj.101.2015.03.19.10.26.02 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Mar 2015 10:26:02 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.47 as permitted sender) client-ip=209.85.215.47; Received: by lamx15 with SMTP id x15so68060157lam.3 for ; Thu, 19 Mar 2015 10:26:02 -0700 (PDT) X-Received: by 10.152.178.197 with SMTP id da5mr71527836lac.56.1426785961855; Thu, 19 Mar 2015 10:26:01 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.35.133 with SMTP id h5csp533004lbj; Thu, 19 Mar 2015 10:26:00 -0700 (PDT) X-Received: by 10.70.65.105 with SMTP id w9mr823240pds.129.1426785960002; Thu, 19 Mar 2015 10:26:00 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id xh9si4136212pab.119.2015.03.19.10.25.59; Thu, 19 Mar 2015 10:25:59 -0700 (PDT) Received-SPF: none (google.com: linux-gpio-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752389AbbCSRZ6 (ORCPT + 1 other); Thu, 19 Mar 2015 13:25:58 -0400 Received: from mail-la0-f54.google.com ([209.85.215.54]:36604 "EHLO mail-la0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753867AbbCSRZ4 (ORCPT ); Thu, 19 Mar 2015 13:25:56 -0400 Received: by lamx15 with SMTP id x15so68057781lam.3 for ; Thu, 19 Mar 2015 10:25:55 -0700 (PDT) X-Received: by 10.112.170.132 with SMTP id am4mr69264979lbc.89.1426785955349; Thu, 19 Mar 2015 10:25:55 -0700 (PDT) Received: from localhost ([195.238.92.128]) by mx.google.com with ESMTPSA id q10sm410023laa.22.2015.03.19.10.25.54 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 19 Mar 2015 10:25:54 -0700 (PDT) From: To: Javier Martinez Canillas , Linus Walleij , Alexandre Courbot , ssantosh@kernel.org, Kevin Hilman , tony@atomide.com Cc: linux-omap@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Grygorii Strashko Subject: [PATCH 1/8] gpio: omap: convert omap_gpio_is_input() to use gpio offset Date: Thu, 19 Mar 2015 19:25:37 +0200 Message-Id: <1426785944-17255-2-git-send-email-grygorii.strashko@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1426785944-17255-1-git-send-email-grygorii.strashko@linaro.org> References: <1426785944-17255-1-git-send-email-grygorii.strashko@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-gpio@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: grygorii.strashko@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.47 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Grygorii Strashko Convert omap_gpio_is_input() to use GPIO offset instead of mask and, in such way, make code simpler and remove few lines of code. Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 2b2fc4b..ce71239 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -472,11 +472,11 @@ static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) } } -static int omap_gpio_is_input(struct gpio_bank *bank, int mask) +static int omap_gpio_is_input(struct gpio_bank *bank, unsigned offset) { void __iomem *reg = bank->base + bank->regs->direction; - return readl_relaxed(reg) & mask; + return readl_relaxed(reg) & BIT(offset); } static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned gpio, @@ -519,7 +519,7 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned type) offset = GPIO_INDEX(bank, gpio); retval = omap_set_gpio_triggering(bank, offset, type); omap_gpio_init_irq(bank, gpio, offset); - if (!omap_gpio_is_input(bank, BIT(offset))) { + if (!omap_gpio_is_input(bank, offset)) { spin_unlock_irqrestore(&bank->lock, flags); return -EINVAL; } @@ -976,12 +976,10 @@ static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) static int omap_gpio_get(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank; - u32 mask; bank = container_of(chip, struct gpio_bank, chip); - mask = (BIT(offset)); - if (omap_gpio_is_input(bank, mask)) + if (omap_gpio_is_input(bank, offset)) return omap_get_gpio_datain(bank, offset); else return omap_get_gpio_dataout(bank, offset);