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[209.132.180.67]) by mx.google.com with ESMTP id je9si2917799pbd.249.2015.02.03.07.51.32; Tue, 03 Feb 2015 07:51:33 -0800 (PST) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965900AbbBCPvb (ORCPT + 5 others); Tue, 3 Feb 2015 10:51:31 -0500 Received: from mail-lb0-f172.google.com ([209.85.217.172]:65448 "EHLO mail-lb0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965641AbbBCPvb (ORCPT ); Tue, 3 Feb 2015 10:51:31 -0500 Received: by mail-lb0-f172.google.com with SMTP id l4so39461960lbv.3 for ; Tue, 03 Feb 2015 07:51:29 -0800 (PST) X-Received: by 10.112.162.226 with SMTP id yd2mr25390174lbb.1.1422978689638; Tue, 03 Feb 2015 07:51:29 -0800 (PST) Received: from localhost ([195.238.92.128]) by mx.google.com with ESMTPSA id s3sm671998lag.10.2015.02.03.07.51.28 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 03 Feb 2015 07:51:29 -0800 (PST) From: To: Tony Lindgren , Paul Walmsley , linux-omap@vger.kernel.org Cc: , sumit.semwal@linaro.org, linux-arm-kernel@lists.infradead.org, Nishanth Menon , Grygorii Strashko , Grygorii Strashko Subject: [PATCH] ARM: dra7xx: hwmod: drop .modulemode from pcie1/2 hwmods Date: Tue, 3 Feb 2015 17:51:24 +0200 Message-Id: <1422978684-4826-1-git-send-email-grygorii.strashko@linaro.org> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: grygorii.strashko@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Grygorii Strashko Now DRA7xx pcie1/2 hwmods define PRCM configuration as following: .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET, .rstctrl_offs = DRA7XX_RM_L3INIT_RSTCTRL_OFFSET, .modulemode = MODULEMODE_SWCTRL, which is completely wrong because DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET is clockdomain ctrl register and NOT module ctrl register. And they have diffrent allowed values for bits[0,1]: CLKTRCTRL         MODULEMODE                                   0x0: NO_SLEEP     0x0: Module is disabled by SW.               0x1: SW_SLEEP     0x1: Module is managed automatically by HW   0x2: SW_WKUP      0x2: Module is explicitly enabled.           0x3: HW_AUTO      0x3: Reserved   As result, following message can be seen during suspend: "omap_hwmod: pcie1: _wait_target_disable failed" Fix it by removing .modulemode from pcie1/2 hwmods and, in that way, prevent clockdomain ctrl register writing from HWMOD core. Signed-off-by: Grygorii Strashko --- More over, it looks like pcie1/2 hwmods are fake and have to be dropped at all. The real HWMODs are PCIESS1/2. Unfortunatelly, not all information on PCIE is public, so I could be wrong here. --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index ffd6604..a428b2d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1478,7 +1478,6 @@ static struct omap_hwmod dra7xx_pcie1_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, }, }, }; @@ -1492,7 +1491,6 @@ static struct omap_hwmod dra7xx_pcie2_hwmod = { .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, }, }, };