From patchwork Fri Sep 12 12:01:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 37296 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ee0-f69.google.com (mail-ee0-f69.google.com [74.125.83.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E32BA206A5 for ; Fri, 12 Sep 2014 12:02:23 +0000 (UTC) Received: by mail-ee0-f69.google.com with SMTP id t10sf476723eei.0 for ; Fri, 12 Sep 2014 05:02:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :mime-version:sender:precedence:list-id:x-original-sender :x-original-authentication-results:mailing-list:list-post:list-help :list-archive:list-unsubscribe:content-type; bh=RwdcCA/f53VZucuHyNWPs8yNKsuYxzsSLoz0+bDGWzY=; b=LRtSpiS/fRU9e8YynQI15rYfMCWNjtyZSNKJKlL9KTrssoofd6/wLTO/XpmUPsZgKC FfHB2MPFUimy8awjbXtl0SB+zvrSEttjjadcOoty7WVe1wptI69vV+c6PyXo/X4kMYOh kWgN59YWqFE/PiHqOh6hog/HNIbfSo4j7U/geoVICn3YTJEH3KIqTa1zEVbLyywrPZa6 u/C08OEY4c6VeUgt+/naOxCyQRsmjLn7Yq4dNIvVMSv9HeVzfFbUbCTTgHeP1geQaDue SYIqq2yitDmlaSQbMuTgD2IESYnz0sMTFfVpPHAZiB41vP4PzMbF5t1PtSkIxOWI2vaa 1Y3g== X-Gm-Message-State: ALoCoQlGt0YajkICpbDiMSZqBCAPJAcEjuq7lOaJMV+pZ85OQa9U4jWZoj9zUQqpmlDUjh1ycGfI X-Received: by 10.180.81.226 with SMTP id d2mr506726wiy.5.1410523341088; Fri, 12 Sep 2014 05:02:21 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.87.175 with SMTP id az15ls157062lab.96.gmail; Fri, 12 Sep 2014 05:02:20 -0700 (PDT) X-Received: by 10.112.199.197 with SMTP id jm5mr7955420lbc.19.1410523340923; Fri, 12 Sep 2014 05:02:20 -0700 (PDT) Received: from mail-lb0-f180.google.com (mail-lb0-f180.google.com [209.85.217.180]) by mx.google.com with ESMTPS id s6si6100421las.121.2014.09.12.05.02.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 12 Sep 2014 05:02:20 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.180 as permitted sender) client-ip=209.85.217.180; Received: by mail-lb0-f180.google.com with SMTP id b12so742857lbj.39 for ; Fri, 12 Sep 2014 05:02:20 -0700 (PDT) X-Received: by 10.112.163.103 with SMTP id yh7mr7937458lbb.73.1410523339814; Fri, 12 Sep 2014 05:02:19 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.141.42 with SMTP id rl10csp717352lbb; Fri, 12 Sep 2014 05:02:18 -0700 (PDT) X-Received: by 10.50.18.69 with SMTP id u5mr1495026igd.19.1410523338258; Fri, 12 Sep 2014 05:02:18 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id iv3si7586197pbd.30.2014.09.12.05.02.17 for ; Fri, 12 Sep 2014 05:02:18 -0700 (PDT) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753759AbaILMCQ (ORCPT + 5 others); Fri, 12 Sep 2014 08:02:16 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:41314 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753714AbaILMCQ (ORCPT ); Fri, 12 Sep 2014 08:02:16 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s8CC1Rd9025239; Fri, 12 Sep 2014 07:01:27 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s8CC1R9M018919; Fri, 12 Sep 2014 07:01:27 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Fri, 12 Sep 2014 07:01:27 -0500 Received: from sokoban.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s8CC1MN6002410; Fri, 12 Sep 2014 07:01:23 -0500 From: Tero Kristo To: CC: , Mike Turquette , Paul Walmsley , Tony Lindgren , Mark Rutland , Peter Ujfalusi , Jyri Sarha , Stefan Assmann Subject: [PATCHv2] clk: ti: change clock init to use generic of_clk_init Date: Fri, 12 Sep 2014 15:01:57 +0300 Message-ID: <1410523317-14787-1-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Previously, the TI clock driver initialized all the clocks hierarchically under each separate clock provider node. Now, each clock that requires IO access will instead check their parent node to find out which IO range to use. This patch allows the TI clock driver to use a few new features provided by the generic of_clk_init, and also allows registration of clock nodes outside the clock hierarchy (for example, any external clocks.) Signed-off-by: Tero Kristo Cc: Mike Turquette Cc: Paul Walmsley Cc: Tony Lindgren Cc: Mark Rutland Cc: Peter Ujfalusi Cc: Jyri Sarha Cc: Stefan Assmann Acked-by: Tony Lindgren --- Changes from v1: - fixed the retry logic for deferred clock inits, this wasn't working properly in v1 arch/arm/mach-omap2/io.c | 12 +++++-- arch/arm/mach-omap2/prm_common.c | 2 -- drivers/clk/ti/clk.c | 68 ++++++++++++++++++++++++-------------- include/linux/clk/ti.h | 1 + 4 files changed, 54 insertions(+), 29 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 5d0667c..a1b82a9 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -734,8 +734,16 @@ int __init omap_clk_init(void) ti_clk_init_features(); ret = of_prcm_init(); - if (!ret) - ret = omap_clk_soc_init(); + if (ret) + return ret; + + of_clk_init(NULL); + + ti_dt_clk_init_retry_clks(); + + ti_dt_clockdomains_setup(); + + ret = omap_clk_soc_init(); return ret; } diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 76ca320..3b89080 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -525,8 +525,6 @@ int __init of_prcm_init(void) memmap_index++; } - ti_dt_clockdomains_setup(); - return 0; } diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index b1a6f71..337abe5 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -25,8 +25,8 @@ #undef pr_fmt #define pr_fmt(fmt) "%s: " fmt, __func__ -static int ti_dt_clk_memmap_index; struct ti_clk_ll_ops *ti_clk_ll_ops; +static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS]; /** * ti_dt_clocks_register - register DT alias clocks during boot @@ -108,9 +108,21 @@ void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index) struct clk_omap_reg *reg; u32 val; u32 tmp; + int i; reg = (struct clk_omap_reg *)&tmp; - reg->index = ti_dt_clk_memmap_index; + + for (i = 0; i < CLK_MAX_MEMMAPS; i++) { + if (clocks_node_ptr[i] == node->parent) + break; + } + + if (i == CLK_MAX_MEMMAPS) { + pr_err("clk-provider not found for %s!\n", node->name); + return NULL; + } + + reg->index = i; if (of_property_read_u32_index(node, "reg", index, &val)) { pr_err("%s must have reg[%d]!\n", node->name, index); @@ -127,20 +139,14 @@ void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index) * @parent: master node * @index: internal index for clk_reg_ops * - * Initializes a master clock IP block and its child clock nodes. - * Regmap is provided for accessing the register space for the - * IP block and all the clocks under it. + * Initializes a master clock IP block. This basically sets up the + * mapping from clocks node to the memory map index. All the clocks + * are then initialized through the common of_clk_init call, and the + * clocks will access their memory maps based on the node layout. */ void ti_dt_clk_init_provider(struct device_node *parent, int index) { - const struct of_device_id *match; - struct device_node *np; struct device_node *clocks; - of_clk_init_cb_t clk_init_cb; - struct clk_init_item *retry; - struct clk_init_item *tmp; - - ti_dt_clk_memmap_index = index; /* get clocks for this parent */ clocks = of_get_child_by_name(parent, "clocks"); @@ -149,19 +155,31 @@ void ti_dt_clk_init_provider(struct device_node *parent, int index) return; } - for_each_child_of_node(clocks, np) { - match = of_match_node(&__clk_of_table, np); - if (!match) - continue; - clk_init_cb = (of_clk_init_cb_t)match->data; - pr_debug("%s: initializing: %s\n", __func__, np->name); - clk_init_cb(np); - } + /* add clocks node info */ + clocks_node_ptr[index] = clocks; +} - list_for_each_entry_safe(retry, tmp, &retry_list, link) { - pr_debug("retry-init: %s\n", retry->node->name); - retry->func(retry->hw, retry->node); - list_del(&retry->link); - kfree(retry); +/** + * ti_dt_clk_init_retry_clks - init clocks from the retry list + * + * Initializes any clocks that have failed to initialize before, + * reasons being missing parent node(s) during earlier init. This + * typically happens only for DPLLs which need to have both of their + * parent clocks ready during init. + */ +void ti_dt_clk_init_retry_clks(void) +{ + struct clk_init_item *retry; + struct clk_init_item *tmp; + int retries = 5; + + while (!list_empty(&retry_list) && retries) { + list_for_each_entry_safe(retry, tmp, &retry_list, link) { + pr_debug("retry-init: %s\n", retry->node->name); + retry->func(retry->hw, retry->node); + list_del(&retry->link); + kfree(retry); + } + retries--; } } diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index e8d8a35..f75acbf 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -292,6 +292,7 @@ void omap2xxx_clkt_vps_init(void); void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index); void ti_dt_clocks_register(struct ti_dt_clk *oclks); void ti_dt_clk_init_provider(struct device_node *np, int index); +void ti_dt_clk_init_retry_clks(void); void ti_dt_clockdomains_setup(void); int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw, ti_of_clk_init_cb_t func);