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[209.132.180.67]) by mx.google.com with ESMTP id t1si23685831pdi.123.2014.09.09.07.56.17 for ; Tue, 09 Sep 2014 07:56:18 -0700 (PDT) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756958AbaIIO4O (ORCPT + 5 others); Tue, 9 Sep 2014 10:56:14 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:58403 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753703AbaIIO4M (ORCPT ); Tue, 9 Sep 2014 10:56:12 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s89Etr0f003920; Tue, 9 Sep 2014 09:55:53 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s89Etrxc023711; Tue, 9 Sep 2014 09:55:53 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Tue, 9 Sep 2014 09:55:52 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s89EtaMg021075; Tue, 9 Sep 2014 09:55:49 -0500 From: Roger Quadros To: CC: , , , , , , , , , , Roger Quadros Subject: [PATCH v2 04/12] ARM: dts: dra72-evm: Add CAN support Date: Tue, 9 Sep 2014 17:55:26 +0300 Message-ID: <1410274534-22826-5-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1410274534-22826-1-git-send-email-rogerq@ti.com> References: <1410274534-22826-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The board has 2 CAN ports but only the first one can be used. Enable the first CAN port. The second one cannot be used without hardware modification so we don't enable the second port. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra72-evm.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 5147023..e5b7172 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -19,6 +19,29 @@ }; }; +&dra7_pmx_core { + dcan1_pins_default: dcan1_pins_default { + pinctrl-single,pins = < + 0x3d4 (PIN_INPUT | MUX_MODE0) /* dcan1_tx */ + 0x418 (PIN_INPUT | MUX_MODE1) /* wakeup0.dcan1_rx */ + >; + }; + + dcan1_pins_sleep: dcan1_pins_sleep { + pinctrl-single,pins = < + 0x3d4 (PIN_INPUT | MUX_MODE15) /* dcan1_tx.off */ + 0x418 (PIN_INPUT | MUX_MODE15) /* wakeup0.off */ + >; + }; +}; + &uart1 { status = "okay"; }; + +&dcan1 { + status = "ok"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dcan1_pins_default>; + pinctrl-1 = <&dcan1_pins_sleep>; +};